I am creating a new thread to discuss a new Propeller based application which I have extended with the propeller to make use of the unique soft-peripheral capabilities of the chip.
By discussing the design decisions the led me to use the propeller perhaps it will help others to consider using the propeller in their applications
The HoloShield was first mentioned in June 2014 where I first started learning the capabilities of the propeller. Back then it was called the VirtualShield-PRO http://forums.parallax.com/discussion/156000/fastest-possible-fifo-buffer-to-infinity-shield-kickstarter-and-beyond
Why the propeller?
The task for the HoloShield is to be able to virtualize the signals of almost any circuit. This means I need to be able to put any peripheral combination on any pin. And not just standard SPI/I2C peripherals but also custom peripherals like a WS2812 neopixel decoder. This is not something that standard microcontrollers can do!
So the choices then are FPGA or soft-peripheral.
The other design requirement is that I be able to almost instantly update the peripheral configuration. The designs are taken from virtual breadboard layouts, so which pins are connected to which modules and hence which peripherals are all taken from the Virtual Breadboard design and then the peripheral layout is generated and uploaded instantly. This is not easily achieved with an FPGA unless it has all the peripherals already installed and you just send pin mappings. However this is an extensible platform and all peripherals are not yet known as they will be added in the future.
This leaves soft-peripherals and this design requirement is what led me to the propeller.
Soft peripheral super chip!
The propeller is without doubt the best chip on the market for creating soft peripherals. It is fast and real time deterministic and has a unique multicore architecture that can be reconfigured and synchronized to handle a wide variety of scenarios.
So far I have been able to get it to implement I2C/SPI/LCD Logic/WS2812/FIFO's/Compressors/FrameBuffers and more.
The P1 is perfectly satisfactory for the first version of the HoloShield and this leads already to huge amount of potential Holographic Hardware.
Future Soft peripheral super-er chip!
Of course it's also useful to plan out a future direction for the product path to remove limitations you find as go along. For example, the current limit for SPI is 4Mhz and there are applications that use 8Mhz. So I have been on the lookout to improve the performance the P1.
Two options present themselves.
* P1V - A stripped down Verilog version to run in a modern FPGA which has the advantage of keeping the code base but disadvantage of re-engineering the FPGA
* P2 - Using the P2 which has the advantage of aligning with future parallax product path but disadvantage of reworking and maintaining dual code bases
I discussed some of these issues in the post on who will buy the P2
I will continue some points from this discussion on this thread.