We're looking at 5 Watts in a BGA!

cgraceycgracey Posts: 11,930
edited 2014-05-18 - 14:23:05 in Propeller 2
OnSemi has been doing some prep work and their initial power estimation for the core came back at 4-6W. This is without clock-gating, so when they get their synthesis tools to properly infer clock-gating, power will drop by probably 1/3. This is still huge, and doesn't account for memory and I/O power, which could be significant. My gut feeling is that we can get the power down to 5W and not need cooling by using a 17x17mm BGA package.

This all seems, outrageous, I know. I think we are being very ambitious for a 180nm process. This level of design complexity really needs 90nm, or less, to be practical. 40nm would be great - low power and GHz+ speed, but we don't have the budget for that.

I don't know what level of enthusiasm there might be for a 5W BGA Prop2 that costs $12. I think the 5W is worse than $12.


What we can do at this point:

A) Continue on the current trajectory.

B) Pare down the design, jettisoning all kids of features, like hub exec, and get back to something much smaller and maybe faster. The current FPGA implementation could be further honed and later, hopefully, made into a chip using a smaller technology.

C) Drop the current design to four cogs, which would also reduce cache sizes and hub memory down to 128KB. This would also allow us to shrink the die considerably, as we could change the I/O pin aspect ratio to allow them to fit together more densely, occupying more of what was needed for the core. This would also mean the whole chip would fit on an FPGA.

D) Retire to an opium den.

E) Other ideas?
«13456737

Comments

  • mindrobotsmindrobots Posts: 6,506
    edited 2014-04-01 - 10:06:10
    $12 good
    5W bad
    BGA? Probably really bad for anybody fabricating.

    D - :lol: (except hold the opium and bring on the M&Ms!!)
    MOV OUTA, PEACE <div>Rick </div><div>"I've stopped using programming languages with Garbage Collection, they keep deleting my source code!!"</div>
  • jazzedjazzed Posts: 11,803
    edited 2014-04-01 - 10:13:55
    Ouch.

    Very unsettling. How about: B), D), and E).

    E) P8x32b with 64KB HUB RAM while we wait.
  • SRLMSRLM Posts: 5,045
    edited 2014-04-01 - 10:33:18
    I'd support a Kickstarter type deal to get to the smaller process...
  • ColeyColey Posts: 968
    edited 2014-04-01 - 10:42:57
    SRLM wrote: »
    I'd support a Kickstarter type deal to get to the smaller process...

    Agreed, we would need to show some nice applications to aid the process though ;-)

    Chip, have you ever considered this route? I best most on here would support it.
  • dr hydradr hydra Posts: 212
    edited 2014-04-01 - 10:50:39
    I like option A...as long as Parallax makes small affordable break-out boards. The package design doesn't matter...Board design is something that does not interest me. Since the prop 2 will not come in a DIP package...I was going to have to buys boards all along and I would prefer to buy them directly from Parallax
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 22,474
    edited 2014-04-01 - 10:59:02
    Chip,

    I think the current situation is an inevitable consequence of the open design process. So I'll go with ...

    E) Take a month off -- two months off. Go to Mexico, sit on the beach, body surf, and put the P2 out of your mind completely. When you return, you'll have a whole new vision and perspective. Start afresh, and maintain that vision. Stay away from Rocklin. Stay off the forum and the suggestions found here that distract you from your vision. We've done our part, and you really don't need us anymore. A year -- two years -- down the road, convene a presentation in Rocklin, and amaze us with a finished chip, like you did with the P1.

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • mindrobotsmindrobots Posts: 6,506
    edited 2014-04-01 - 11:08:57
    Chip,

    I think the current situation is an inevitable consequence of the open design process. So I'll go with ...

    E) Take a month off -- two months off. Go to Mexico, sit on the beach, body surf, and put the P2 out of your mind completely. When you return, you'll have a whole new vision and perspective. Start afresh, and maintain that vision. Stay away from Rocklin. Stay off the forum and the suggestions found here that distract you from your vision. We've done our part, and you really don't need us anymore. A year -- two years -- down the road, convene a presentation in Rocklin, and amaze us with a finished chip, like you did with the P1.

    -Phil

    But I just bought a BIG, honkin' FPGA!! :frown:


    ...and as for the Kickstarter??

    But I just bought a BIG, honkin' FPGA!! :frown:
    MOV OUTA, PEACE <div>Rick </div><div>"I've stopped using programming languages with Garbage Collection, they keep deleting my source code!!"</div>
  • Dave HeinDave Hein Posts: 5,962
    edited 2014-04-01 - 11:16:47
    How much more expensive is the 90nm process? I'm assuming that would cut the power to 25%. I think the alternative is to list all of the contributors to power consumption and figure out which items use the most power, and are expendable.
  • rjo__rjo__ Posts: 2,076
    edited 2014-04-01 - 11:18:47
    Chip and Ken,

    I don't understand the implications of the 5W level. So until someone explains why 5W is such a problem, I like A. I assume that there are some very compelling arguments against 5W, but you have a really nice design, and I would hate to see you scrap it all. If 5W is an absolute "no" and you can keep the current design and go to 4 cogs…I think 128K is more than enough… then my next favorite is D.

    At this point I think my absolute favorite is F.

    F:

    The time has come to take Parallax public. Figure out how much money you would need to do 40nm in house. Figure out how much money your grandchildren will need. Multiply that number by a factor of two. Hire a consultant to write a white paper. You will be rich by next December… and we will have more cogs, more ram, and more features than we could have dreamed. If you don't want to be rich, then

    G:
    Go to crowd funding and get to 40nm on the cheap. For crowd funding, timing is critical. So, you will need to thoroughly test the design before entering the mash pit.

    Rich
  • User NameUser Name Posts: 1,451
    edited 2014-04-01 - 11:22:38
    The BGA is not a put-off at all for me. From the get-go I planned on purchasing modules rather than bare chips. For anyone dealing in volume production, BGA doesn't seem like that big of a deal. It happens all the time.

    5W? Doesn't phase me as much as it seems to phase others. I never envisioned a battery-powered P2. Still, the crowd-source idea is appealing...even intriguing!

    Ditch HubEx? Do it today!

    Four cogs? Amazing how useful a single P2 cog is! Four P2 cogs would handle a BUNCH.
    Platåberget
  • Heater.Heater. Posts: 21,213
    edited 2014-04-01 - 11:29:58
    Chip,

    Talk about rocks and hard places.

    Phil probably has a very good idea.

    Options A) and D) look like the roads to hell. As attractive as D) seems sometimes.

    B) Sounds like the first place to look. The loss pf HUB exec would be big shame but the P1 managed OK with out it. Pruning those 500 opcodes down to about 50 would help.

    C) Given that we have threads now perhaps 4 cogs is OK. A hard way to go though. Cutting back on RAM would be horrible. Those C guys need it.

    E) Ah..got me there.

    Yep, I'd go for the therapeutic break. It's amazing what ones brain can come up with whilst you are busy thinking about something totally different.

    Dave is also right, measure the problem, where are the high power low use value areas.

    @rjo,

    Well, my soldering iron is 15 watts and it melts solder. 5 watts generated in a much smaller area is going to melt something.
  • ctwardellctwardell Posts: 1,700
    edited 2014-04-01 - 11:45:46
    Definitely need to identify power use per feature as best as you can like David Hein suggested.

    Look at refactoring the design of features to reduce power consumption if possible, then put features on the chopping block if the power consumption is still excessive.

    C.W.
  • LtechLtech Posts: 229
    edited 2014-04-01 - 11:53:17
    Nice to get a heater in house, your def need it in America this winter .

    nice day-te today
  • W9GFOW9GFO Posts: 3,915
    edited 2014-04-01 - 11:59:27
    One day earlier or later hearing this and I would have been worried...
  • mindrobotsmindrobots Posts: 6,506
    edited 2014-04-01 - 12:01:28
    W9GFO wrote: »
    One day earlier or later hearing this and I would have been worried...

    You mean Chip could be the Orson Wells of the semi-conductor world?? :lol: (Ok, granted that was on Halloween but you get the idea!)
    MOV OUTA, PEACE <div>Rick </div><div>"I've stopped using programming languages with Garbage Collection, they keep deleting my source code!!"</div>
  • ctwardellctwardell Posts: 1,700
    edited 2014-04-01 - 12:02:01
    W9GFO wrote: »
    One day earlier or later hearing this and I would have been worried...

    One would hope you are correct...

    C.W.
  • Heater.Heater. Posts: 21,213
    edited 2014-04-01 - 12:04:44
    Boo, April fools pranks are supposed to have been over ten hour ago around here.
  • BaggersBaggers Posts: 2,965
    edited 2014-04-01 - 12:05:32
    Haha, well done Chip :D you got so many members with that one!

    You rock! :)
  • potatoheadpotatohead Posts: 9,904
    edited 2014-04-01 - 12:07:22
    Come on guys. Tell me this is April 1 and that the old P2 didn't synthestze, and....

    :)
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 22,474
    edited 2014-04-01 - 12:08:52
    In either case, I stand by my advice. :)

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • User NameUser Name Posts: 1,451
    edited 2014-04-01 - 12:11:00
    In either case, I stand by my advice. :)

    -Phil

    Ditto with mine!
    Platåberget
  • cgraceycgracey Posts: 11,930
    edited 2014-04-01 - 12:20:58
    I was trying to think of some prank thread for April 1st, but gave up.

    Then, after getting an email from OnSemi, I forgot all about it being April 1st, and thought I'd better start figuring out what we are going to do about this power problem.

    I'm going to be talking to them in a few minutes...
  • potatoheadpotatohead Posts: 9,904
    edited 2014-04-01 - 12:37:39
    !!??!!??!!?? lol Wut?

    Serious? No.
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
  • rjo__rjo__ Posts: 2,076
    edited 2014-04-01 - 12:44:40
    I still think you should go to 40mm.
  • BaggersBaggers Posts: 2,965
    edited 2014-04-01 - 12:44:52
    Then in that case, and as you can't go to a smaller process, I'd suggest removing whatever mods necessary to get it to a level you're happy with, as pre-mods, the P2 we had was and will be an awesome chip with amazing features, and get it sorted in time for the shuttle run, and get some P2's out for Xmas as previously planned.

    Then assuming it goes well, we can then add all the functions back in for P3.
  • potatoheadpotatohead Posts: 9,904
    edited 2014-04-01 - 12:47:11
    Seconded. That can help fund P3.
    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
  • mindrobotsmindrobots Posts: 6,506
    edited 2014-04-01 - 12:50:30
    Is it relatively easy to identify the functions that are chip warmers?

    e) Make a list, go sit under a walnut tree (by yourself) and whack away features until it fits the power profile you want. Then come back and tell us what we get in a P2 and we are all happy. (We are ALL HAPPY, right guys????)


    (We're all really chomping at the bit to start workign on teh P2 anyway!!)
    MOV OUTA, PEACE <div>Rick </div><div>"I've stopped using programming languages with Garbage Collection, they keep deleting my source code!!"</div>
  • Heater.Heater. Posts: 21,213
    edited 2014-04-01 - 12:51:08
    I'm off to the opium den. I can't tell what's real and what's not any more anyway so it won't make much difference.
  • John AbshierJohn Abshier Posts: 1,102
    edited 2014-04-01 - 12:57:22
    I would go for option B. Make the design trajectory bend toward the P1 and not bend toward ARM. If you get 160MZ with piplined instructions, that is almost an order of magnitude faster than P1. I would hate to lose the functionality planned for the IO pins. I do worry about cost. A PII, breakout board, power supply, RAM, and passives looks like it may cost more than a Raspberry Pi. Five watts is perhaps a killer for Activity Bot/Scribbler class robots. At that power level is USB power still an option?

    John Abshier
  • John AbshierJohn Abshier Posts: 1,102
    edited 2014-04-01 - 13:10:01
    Chip,
    Re sitting under walnut trees or on the beach. The P1 just seemed "right" I think that is because you had a vision and designed to that vision. The forum threads of the last several months, which I only often skim and not read for detail, make me think of a camel, a horse designed by a committee. I don't know what your vision for the PII is. It is probably not my vision. But I am not experienced enough and willing to put in the required effort to design a chip. You are. I think you should step away from all of us on the forum, decide what you want the PII chip to be, probably also look at what Parallax the company needs, and make a PII that hopefully will seem "right" when you are done.

    John Abshier
This discussion has been closed.