I agree - having spent many dollars on this "hobby". But I wanted to bring this discussion home to what it is we are really trying to achieve.
And the discussion started with RossH trying to decide what was WORTH doing. Worth, to me, equals goals and costs.
Maybe I am just Captain Bringdown, trying to rain on everyone's parade.
Yes, that may help. It's an idea I hope to find time to work on soon.
@JMH,
I understand your point, but it's not only about dollars and cents - my time costs nothing (at least, so my customers seem to think) and is also worth nothing (at least, so my wife seems to think) - but I'm nearing the end of what I wanted to do for my own purposes, and if I carry on beyond that I'd like it to be on something that's likely to get used.
Ross.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Catalina - a FREE C compiler for the Propeller - see Catalina
None of what I have to say is of any help with your current dilemma, Ross. I apologize for that, but I am convinced it is possible to overcome the one-byte wide bottleneck with a new hybrid card, one, which is closely aligned to the existing Hydra interface. A 16Bit buss with four addition Pins using a CPLD could do the what a 256 X16 bit Ram with two octal latches can do, PLUS provide fast access to 16 longs using post inc/dec addressing. The CPLD can switch modes to post Inc/Dec mode, with fast ram access to 16 longs relative to the latched ADR. Additional unlatched paging pins can still be used which would have access to the 16 longs. At least this would accommodate a small-unrolled LMM fetch. It does look like sequential access is required and will no doubt influence the outcome.
Maybe after UPEW and we see LARGOS, Parallax might consider producing a CXTREME board. [noparse]:)[/noparse]
@Clusso99, Prop-11 with the UHS Async link, hey, Ramblade might be the sleeper yet. [noparse]:)[/noparse]
Comments
I agree - having spent many dollars on this "hobby". But I wanted to bring this discussion home to what it is we are really trying to achieve.
And the discussion started with RossH trying to decide what was WORTH doing. Worth, to me, equals goals and costs.
Maybe I am just Captain Bringdown, trying to rain on everyone's parade.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
JMH
Maybe use the prop to be a smart CPLD ??
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Links to other interesting threads:
· Home of the MultiBladeProps: TriBladeProp, RamBlade, TwinBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: Micros eg Altair, and Terminals eg VT100 (Index) ZiCog (Z80), MoCog (6809)
· Search the Propeller forums (via Google)
My cruising website is: ·www.bluemagic.biz·· MultiBladeProp is: www.bluemagic.biz/cluso.htm
Yes, that may help. It's an idea I hope to find time to work on soon.
@JMH,
I understand your point, but it's not only about dollars and cents - my time costs nothing (at least, so my customers seem to think) and is also worth nothing (at least, so my wife seems to think) - but I'm nearing the end of what I wanted to do for my own purposes, and if I carry on beyond that I'd like it to be on something that's likely to get used.
Ross.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Catalina - a FREE C compiler for the Propeller - see Catalina
None of what I have to say is of any help with your current dilemma, Ross. I apologize for that, but I am convinced it is possible to overcome the one-byte wide bottleneck with a new hybrid card, one, which is closely aligned to the existing Hydra interface. A 16Bit buss with four addition Pins using a CPLD could do the what a 256 X16 bit Ram with two octal latches can do, PLUS provide fast access to 16 longs using post inc/dec addressing. The CPLD can switch modes to post Inc/Dec mode, with fast ram access to 16 longs relative to the latched ADR. Additional unlatched paging pins can still be used which would have access to the 16 longs. At least this would accommodate a small-unrolled LMM fetch. It does look like sequential access is required and will no doubt influence the outcome.
Maybe after UPEW and we see LARGOS, Parallax might consider producing a CXTREME board. [noparse]:)[/noparse]
@Clusso99, Prop-11 with the UHS Async link, hey, Ramblade might be the sleeper yet. [noparse]:)[/noparse]
Ron
I agree. UPEW means inspiration. Maybe it is better to wait until after the show for any new designs to materialize.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
JMH