Understanding SX48 INTPARAMFSR, RAM bank 0, etc

Bean -- after hours of hair pulling last night and this morning, I discovered a bug/error in the latest beta release for the SX48. This is my first SX48 project, so I know there are few differences (bank in asm, loading m, read-write-modify on setb/clrb), but this is what burned me:
SX28 list:
··· 75· =000000F7······ __INTPARAMFSR··· EQU· $F7
SX48 list
·· 63· =00000010······ __INTPARAMFSR··· EQU· $10
So if you use INTPARAMFSR in anyway, and have a regular variable at $10 (as I did), the app will be wacky. In my case, while I usually use NOCODE or NOPRESERVE in my ISRs, I often alias INTPARAMFSR registers for my own "shadow" purposes (say, to save/restore M in the ISR for apps that may change tris states in both the ISR and the mainline).
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Post Edited (Zoot) : 3/29/2009 7:11:32 PM GMT
SX28 list:
··· 75· =000000F7······ __INTPARAMFSR··· EQU· $F7
SX48 list
·· 63· =00000010······ __INTPARAMFSR··· EQU· $10
So if you use INTPARAMFSR in anyway, and have a regular variable at $10 (as I did), the app will be wacky. In my case, while I usually use NOCODE or NOPRESERVE in my ISRs, I often alias INTPARAMFSR registers for my own "shadow" purposes (say, to save/restore M in the ISR for apps that may change tris states in both the ISR and the mainline).
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
When the going gets weird, the weird turn pro. -- HST
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Post Edited (Zoot) : 3/29/2009 7:11:32 PM GMT
Comments
It is NOT a bug. The sx48/52 stores __paramX variables in rambank0
using semi_direct addressing, eg. clr fsr, mov __INTPARAMFSR,__PARAM1
You'd better use conditional compilation so you can use the same
routine name for storing/retrieving variables no matter what device.
regards peter
MOV FSR, #__INTPARAMFSR+0
MOV W, IND
MOV M, W
Which came into direct conflict and wiped out the "regular" variable in the mainline.
When I manually assign all my variables and DON'T use INTPARAMFSR in any way, I have no conflicts. This was borne out by both my list file AND by the application in action.
Now if there is something else I am missing here, please enlighten me.
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In any case, in the following, in 2.00.18 for SX48, __INTPARAMFSR and idx are both assigned location $10:
The list output for above yields:
·and
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For the sx48/52, when fsr=0, rambank0 is enabled at $10-$1F,
that's why INTPARAMFSR equ $10
You then use direct addressing to access the ram
(indirect via IND is pointless as fsr is 0)
So for sx48/52 you would use
CLR FSR
MOV·W,__INTPARAMFSR+0
MOV M, W
That's the only way to access rambank0.
regards peter
You know what, I get it, but I must be fuzzy on memory mapping for the SX48... rambank0 really has 32 bytes?
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$00-$0F are the global bytes that are always accesible
regards peter
Are you saying that:
"bank 0" registers are really at $10-$1F and can *only* be accessed as follows:
CLR FSR
MOV fr, W· ; where fr is $10-$1F
But that $00-$0F are always the globals, e.g., without having to change banks or set FSR:
MOV fr, W ; where fr is $00-$0F
(that doesn't sound right; wouldn't FSR.4 have to be·1 to get the "globals"?)
And that $10-$Fx are "normal" in that you can either:
BANK fr
SETB/CLRB FSR.7
MOV fr, W
or
MOV FSR, #fr
MOV fr, #1
or
MOV FSR, #fr
MOV IND, #1
Shoot... 30+ SX28 projects and I'm hung up on this :-)
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For sx18/20/28, bank0 is $10-$1F
Yes, and you don't need to set fsr.4 for the globals
You must set fsr.4 to access any bank via $10-$1F on sx18/20/28
And you can use indirect addressing for the globals except IND.
mov fsr,#5
clr ind· 'this actually does clr ra
regards peter