C4SX: A workaround and two fixes on the way!

Greetings!· If you are interested in the C4SX C enviroment for the SX, you'll likely be interested in this posting:

Fixed CC1B Bugs - these bugs are noted in the C4SX 0.2 documentation.
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Thanks to efforts of the CC1B author, the following two problems/bugs have been fixed and the fixes will be in the next CC1B release.· I do not yet have a release date for the next CC1B.· The second problem has a tested workaround, and it is noted below.
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*** FIXED in next release ***
1)· Issue with 'const char * pointers'.· C example: int puts(const char *in_str)
The root issue is with the pointers that access the const char data.· Simple solution is not to use 'const char' coding techniques.· If you must use them then be sure the pointer to the const char data is in the lower 4 pages of RAM.· This approach allows the sertstc.c and sxstring.c sample programs to work.· This bug appears on the SX28 and is likely also on the SX48.
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*** FIXED in next release ***
2)· Issue with setting TRIS<x>, PLP_<x> and LVL_<x> mode values for I/O on the SX48.· The first of these registers gets set in a C code sequence, sometimes the others do not.· The SX48 sxstring48.c program works around this by only setting TRISA and not setting the other two mode values as they are not really needed.
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Workaround:· (Note this problem only happens on the SX48, not an issue for the SX28)· Add the follow pragma statements around the C code setting the mode values:
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#pragma optimize 8:0·· // turn off type 8 optimization
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#pragma optimize 8:1·· // turn on type 8 optimization
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For example:
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··············· // fix
··············· #pragma optimize 8:0·· // turn off type 8 optimization
··············· LVL_A = 0x00;·· // all CMOS voltages
··············· PLP_A = 0xff;·· // pull-ups off
·· ············TRISA = 0x07;·· // %00000111 -- pin 3 output, others input
··············· // fix
··············· #pragma optimize 8:1·· // turn on type 8 optimization

If anyone has questions, please let me know!

Thanks,
RW Senser