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can a routine library chip be used? — Parallax Forums

can a routine library chip be used?

jeffjohnvoljeffjohnvol Posts: 197
edited 2007-04-24 19:00 in BASIC Stamp

I know this is currently way over my head right now, but if I were to ever make my own stamp boards with I/O ports etc, would it also be possible to have an EPROM that has a library of my (future) common subroutines that I could use with a stamp rather than having to load them into the program memory?· Macintosh used to do something like this to save space on their computers.

Also, if a board were to have 2 or more BS2's on board operating independantly, is it possible to let them share a common memory space for variables and/or configuration settings?



Thanks.

Comments

  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2007-04-24 17:17
    Jeff,

    Due to the way the compiler and BASIC Stamp work this is not possible. However, if you would like to have varying version of your program available to switch to without recompiling and downloading them you can preload them onto a BASIC Stamp 2e, 2sx, 2p, etc and simply run another slot. Take care.

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    Chris Savage
    Parallax Tech Support
  • Mike GreenMike Green Posts: 23,101
    edited 2007-04-24 17:44
    Have a look at this recent thread: http://forums.parallax.com/showthread.php?p=646877

    This provides a framework for using the slots on the larger Stamps in a way that should let you have, perhaps not libraries of routines, but libraries of programs and major functions. As Chris mentioned, the Basic Stamp and its compiler don't support libraries as such. In fact, they have limited support for subroutines in general (only simple GOSUB/RETURN ... no parameters).
  • jeffjohnvoljeffjohnvol Posts: 197
    edited 2007-04-24 18:26
    Thanks guys. My first question was "what are slots" but reading the referenced thread, the must be RAM partitions.

    Any answers to my second question?:

    "Also, if a board were to have 2 or more BS2's on board operating independantly, is it possible to let them share a common memory space for variables and/or configuration settings?"
  • allanlane5allanlane5 Posts: 3,815
    edited 2007-04-24 18:35
    Nope. The BS2 is based on the PIC architecture. The PIC architecture combined a 'register space' (RAM) with some on-chip Flash memory, with the on-chip processor unit, and some general purpose I/O pins. This gives you a reasonably powerful self-contained device.

    At the time the PIC was created, there were LOTS of 8 and 16 bit processors that used external RAM, external EEPROM, and external I/O devices. Thus this really wasn't a goal of the PIC processors. Oh, and the external EEPROM typically required a separate device to program it.

    Now, Parallax has added value to this platform by enabling you to program this device in PBasic -- which is MUCH easier than PIC assembly -- and program it with merely a PC with a serial port.

    I suppose you can attach I2C devices to the BS2, and 'share' information that way. But "sharing RAM", or "Sharing code storage" really isn't going to work.
  • allanlane5allanlane5 Posts: 3,815
    edited 2007-04-24 18:36
    Oh, and note the memory space of the BS2 is like 2000 bytes. So there's not a lot of room there for 'shared' code that you're not using. Most people simply keep a file of 'common code', and cut-and-paste it into their programs.
  • jeffjohnvoljeffjohnvol Posts: 197
    edited 2007-04-24 18:45
    Thank you for all the informed anwers.
  • Mike GreenMike Green Posts: 23,101
    edited 2007-04-24 18:55
    1st question: They're not RAM partitions. They're EEPROM partitions used for storing the programs.

    2nd question: No. The variable space is stored internal to the processor and is not accessible externally.

    You could have a shared external memory. You could use a Ramtrom FRAM which is an EEPROM-like memory that uses a ferroelectric effect to store bits. It's not subject to the write limitiations of normal EEPROM and the write speeds are as fast as the read speed. They come in sizes up to 64K x 8. You could use either I2C or SPI serial protocols with all Stamps connected in a "open-drain" fashion. You'd need some kind of "request/release" mechanism so only one Stamp at a time would try to access the shared memory.
  • jeffjohnvoljeffjohnvol Posts: 197
    edited 2007-04-24 19:00
    Mike Green said...

    You could have a shared external memory. You could use a Ramtrom FRAM which is an EEPROM-like memory that uses a ferroelectric effect to store bits. It's not subject to the write limitiations of normal EEPROM and the write speeds are as fast as the read speed. They come in sizes up to 64K x 8. You could use either I2C or SPI serial protocols with all Stamps connected in a "open-drain" fashion. You'd need some kind of "request/release" mechanism so only one Stamp at a time would try to access the shared memory.
    Ahah.· Thanks Mike!· Thats very interesting.

    Jeff
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