Too many cycles! Any ideas?
Hello, I have a VGA video generator running on the SX chip that sends a 256x192 256 color image to the monitor using the 1024x768x60hz format with a 65MHz pixel clock. I have no problem with the timing, but I do find that the main video loop uses many more clock cycles than my AVR coded version. Sadly, the SX at 65MHz is no faster than the AVR at 20MHz! I would imagine there is a better way to count to 256 (1024/4) without using 6 cycles in the loop....
; ACTIVE VIDEO LINE (1024 CLK)
mov t2,#170 ;2
AVL:
mov rb,t2 ;2
djnz t2,AVL ;4
nop
nop
nop ;1
nop ;1
because this loop takes 6 cycles, I have to settle for 170 pixels, when I really want 256. The setting of T2 takes 2 cycles, then the loop eats 6x170, then I have to add·4 nops to compensate for the lost two cycles when the djnz exits, and to complete the cycles to make an exact 1024 clock cycles.
I hope I am making sense here! I need to execute (mov rb,t2) 256 times in 1024 clock cycles basically. This addresses an external SRAM to pump out the image to the video DAC.
Thanks, I'm sure there is a better way to do this loop.
Brad
·
; ACTIVE VIDEO LINE (1024 CLK)
mov t2,#170 ;2
AVL:
mov rb,t2 ;2
djnz t2,AVL ;4
nop
nop
nop ;1
nop ;1
because this loop takes 6 cycles, I have to settle for 170 pixels, when I really want 256. The setting of T2 takes 2 cycles, then the loop eats 6x170, then I have to add·4 nops to compensate for the lost two cycles when the djnz exits, and to complete the cycles to make an exact 1024 clock cycles.
I hope I am making sense here! I need to execute (mov rb,t2) 256 times in 1024 clock cycles basically. This addresses an external SRAM to pump out the image to the video DAC.
Thanks, I'm sure there is a better way to do this loop.
Brad
·
Comments
Just do
mov rb,#255 ; 2
djnz rb,$ ; 4
You may need some NOPs before the DJNZ and after to get the cycles right and to avoid the read-modify-write problems.
Bean.
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Post Edited (Bean (Hitt Consulting)) : 3/24/2007 1:39:25 AM GMT
My AVR code does this in 4 cycles, but the SX code takes 6, which is my problem.
Thanks,
Brad
Maybe I'm not understanding what you are doing ???
Bean.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
"Educate your children to self-control, to the habit of holding passion and prejudice and evil tendencies subject to an upright and reasoning will, and you have done much to abolish misery from their future and crimes from society"
Benjamin Franklin
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
www.hittconsulting.com
·
Ps,
Your video projects are great by the way.
Cheers!
Brad
·
On the bright side, I did get a full 256x128 image on the screen (image attached is my lowracer trike). The garbage at the start of the image is actually code stored in the SRAM (only using 32K right now, so there is not enough room for both the image and code).
Soon I will have a simple system that can generate decent VGA graphics, 3 voice sound, and read a keyboard and mouse in one SX chip. I know, dude, the propellor will do that already, but that's the very reason why I don't want to use it.
Remember how fun legos were until they started molding many of the complex parts together as a single block? Took all the fun out of it for me! My goal is to learn about video programming, so using a pre made system would spoil it for me. I do think the prop. is a great design,·especially for those that need a solution without all the pain. Like James Kirk once said... "I need my pain!!"
Cheers all!
Brad
Really impressive. Keep up the good work!
Bean.
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
"Educate your children to self-control, to the habit of holding passion and prejudice and evil tendencies subject to an upright and reasoning will, and you have done much to abolish misery from their future and crimes from society"
Benjamin Franklin
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
www.hittconsulting.com
·
I sure wish I knew why all of a sudden, I cannot drive the SX-Key clock past ~55Mhz without it messing up timing. Worked great for the few days I was testing my video system at 65MHz, than I simply watched it get worse on screen until it failed. I had to recode all of my timing for a 50MHz clock, which now means I am running a 640x480 screen due to the easy conversion at 50MHz from the 25.175MHz VGA pixel clock.
The good thing is that I am awaiting the SX48 proto board, so I hope to get up to 75MHz and then divide timings by 3 to run at the same video mode. At 75MHz, I should be able to pump out an easy 320x240x8bits to the 640x480 VGA screen, and still have plenty of cycle during the horizontal blanking period to do realtime 3 voice sound, PS2 input, and tokenized basic lookup.
In the end, I hope to end up with what is basically a VIC-20 on a chip that can be programmed using my own version of basic. It would be like an STV5730 video generator on steroids.
I will post all my data here once the proto boards get here, but here is the very basic timing test loop I am using to generate 320 vertical color bars on the VGA screen. Please note, I do not like indented or highly commented code, so this·may look a bit ugly to most!....
; DEVICE
DEVICE SX28,OSCHS3,STACKX,OPTIONX,TURBO
IRC_CAL IRC_FAST
RESET START
FREQ 50_000_000
START:
; PORT SETTINGS
mode $0F
mov !rb,#%00000000
mov rb,#%00000000
mov !rc,#%00000000
mov rc,#%00000000
; VARIABLES
T1 equ $08
T2 equ $09
T3 equ $10
MAIN:
; 525 (3x175) HLINES
mov t1,#2 ;2
l1:
mov t2,#240 ;2
l2:
call hline ;3
djnz t2,l2 ;4
nop
nop
djnz t1,l1 ;4
;nop
;nop
; 11 BLINES FOR FRONT PORCH
mov t1,#11 ;2
loop3:
call bline ;3
djnz t1,loop3 ;4
;nop
;nop
; 2 BLINES FOR VERTICAL SYNC
mov rc,#%00000001
mov t1,#2 ;2
loop4:
call bline ;2
djnz t1,loop4 ;4
;nop
;nop
mov rc,#%00000011
; 31 BLINES FOR BACK PORCH
mov t1,#31 ;2
loop5:
call bline ;3
djnz t1,loop5 ;4
;nop
;nop
jmp MAIN ;3
HLINE:
; ACTIVE VIDEO LINE (1280 CLK)
mov t3,#213 ;2
AVL:
mov rb,t3 ;2
djnz t3,AVL ;4
nop
nop
; HORIZONTAL FRONT PORCH (32 CLK)
mov t3,#7 ;2
HFP:
djnz t3,HFP ;4
nop
nop
nop ;1
nop ;1
; HORIZONTAL SYNC PULSE (190 CLK)
mov rc,#%00000010 ;2
mov t3,#46 ;2
HSP:
djnz t3,HSP ;4
nop
nop
mov rc,#%00000011 ;2
; HORIZONTAL BACK PORCH (82 CLK)
mov t3,#19 ;2
HBP:
djnz t3,HBP ;4
nop
nop
nop ;1
ret ;3
BLINE:
; BLANK VIDEO LINE (1280 CLK)
mov t3,#213 ;2
BVL:
mov rb,#0 ;2
djnz t3,BVL ;4
nop
nop
; HORIZONTAL FRONT PORCH (32 CLK)
mov t3,#7 ;2
BFP:
djnz t3,BFP ;4
nop
nop
nop ;1
nop ;1
; HORIZONTAL SYNC PULSE (190 CLK)
mov rc,#%00000010 ;2
mov t3,#46 ;2
BSP:
djnz t3,BSP ;4
nop
nop
mov rc,#%00000011 ;2
; HORIZONTAL BACK PORCH (82 CLK)
mov t3,#19 ;2
BBP:
djnz t3,BBP ;4
nop
nop
nop ;1
ret ;3
This used to work up to 65MHz, but I think the clock on the SX-Key is on the fritz. I am now using a 50MHz resonator.
Cheers,
Brad
Post Edited (Atomic Zombie) : 3/25/2007 7:32:13 PM GMT
Is your SX-Key plugged directly into whatever SX board you are using, or have you extended the connections to create a strain relief ? Have you verified that your power supply is stable and running at 5V? Have you tried adding any additional capacitance where the power enters your board to help smooth out spikes?
Thanks,
PeterM