Shop OBEX P1 Docs P2 Docs Learn Events
Hardware stack — Parallax Forums

Hardware stack

TMMTMM Posts: 19
in PASM2/Spin2 (P2)

In my ongoing quest to understand the P2 better level, I was wondering what about this 8-level hardware stack for fastest subroutine calls/returns and push/pop operations. And later K / Stack: The 8-level hardware stack used for subroutine calls (stores C, Z, and PC) and temporary 32-bit push/pop storage.

Does this mean that there's some extra ram in each cog that can hold 8 call frames for CALL/RET pairs? What happens if the call stack is deeper than 8? The Propeller-2-Assembly-Language-PASM2-Manual-20221101-1.pdf doesn't seem to mention this.

It seems that the CALLA and friends is a bit better described as it is all relative to a pointer to hubram.

Comments

  • TonyB_TonyB_ Posts: 2,224
    edited 2025-11-11 15:43

    @TMM said:
    Does this mean that there's some extra ram in each cog that can hold 8 call frames for CALL/RET pairs? What happens if the call stack is deeper than 8? The Propeller-2-Assembly-Language-PASM2-Manual-20221101-1.pdf doesn't seem to mention this.

    Each cog has its own 8-level 32-bit hardware stack that will wrap around if stack level deeper than eight, which is unlikely to occur. HW stack is implemented in a logic as a big shift register and there's no stack pointer.

    During skip sequences a CALL suspends skipping until there is a RET back to the same stack level as the CALL. This means a CALL counts as only one skip instruction and calls can be nested.

    CALLA & CALLB are different from other CALL instructions as they use hub RAM for the stack with PTRA & PTRB as stack pointers. Note that stack grows upwards.

  • TMMTMM Posts: 19

    @TonyB_ said:
    During skip sequences a CALL suspends skipping until there is a RET back to the same stack level as the CALL. This means a CALL counts as only one skip instruction and calls can be nested.

    I understood the rest of your post. I've read this part several times now and looked up the SKIPF and SKIP instructions again to refresh my memory. However I really do not understand this section at all :sweat_smile:

    Could you give me a more step by step explanation? I had found no correlation between CALL/RET pairs and SKIPs, I'm quite confused.

    Thank you!

  • TonyB_TonyB_ Posts: 2,224
    edited 2025-11-11 18:05

    @TMM said:

    @TonyB_ said:
    During skip sequences a CALL suspends skipping until there is a RET back to the same stack level as the CALL. This means a CALL counts as only one skip instruction and calls can be nested.

    I understood the rest of your post. I've read this part several times now and looked up the SKIPF and SKIP instructions again to refresh my memory. However I really do not understand this section at all :sweat_smile:

    Could you give me a more step by step explanation? I had found no correlation between CALL/RET pairs and SKIPs, I'm quite confused.

    Thank you!

    If you never use SKIPF then you can ignore the rest of this message.

    Below is part of the rotate/shift code for an 8086 emulator. Most of these 8086 instructions have a direct P2 equivalent that can be used for multi-bit rotate/shift. However, multi-bit byte or word RCL and RCR cannot be done by a single P2 instruction. The code below shows eight of 32 skipping instructions that follow a SKIPF. I can spare only one instruction each for 8086 RCL & RCR but that is all right as each P2 CALL counts as a single skipping instruction. Skipping is disabled inside RCL_dest_count and RCR_dest_count and both of these routines could contain a CALL to call a nested subroutine, which itself could also contain a CALL, etc.

    The skipping logic keeps track of the hardware stack level and after the RET or _RET_ at the end of RCL_dest_count or RCR_dest_count the HW stack level will be the same as it was when the initial CALL was made and therefore skipping will resume. The a-h and A-H comment characters are used to automatically create the correct skipping patterns for byte and word data width, respectively, using a program I've written.

    Conclusion: CALL and its associated subroutine (no matter how long) counts as only one instruction during skipping sequences, which makes skipping much more powerful.

    rol     dest,count          wc  'a||||||| A|||||||  c = CF
ror     dest,count          wc  '|b|||||| |B||||||  c = CF
call    #\RCL_dest_count        '||c||||| ||C|||||  c = CF
call    #\RCR_dest_count        '|||d|||| |||D||||  c = CF
shl     dest,count          wc  '||||e||| ||||E|||  c = CF
shr     dest,count          wc  '|||||f|| |||||F||  c = CF
mov     dest,FFFF           wc  '||||||g| ||||||G|  = -1, nc
sar     dest,count          wc  '|||||||h |||||||H  c = CF
  • TMMTMM Posts: 19

    I understand now what you were trying to say! Thank you!

    I suppose that if you try to skip or skipf in a function being called then things will go very wrong?

  • TonyB_TonyB_ Posts: 2,224

    @TMM said:
    I suppose that if you try to skip or skipf in a function being called then things will go very wrong?

    Yes, subroutines called from a skipping sequence cannot themselves use skipping because that will destroy the original remaining skip bits. There is only one level of skip bits.

    Ideally a future P3 or P2+ would have 64-bit wide stack so that skip bits could be pushed and popped and each stack level could support skipping.

  • TMMTMM Posts: 19

    @TonyB_ said:
    Ideally a future P3 or P2+ would have 64-bit wide stack so that skip bits could be pushed and popped and each stack level could support skipping.

    That makes sense, yes! Thanks for all the explanations!

Sign In or Register to comment.