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Assembly NOP-ify extended line — Parallax Forums

Assembly NOP-ify extended line

RaymanRayman Posts: 15,618
edited 2025-09-15 21:21 in Propeller 2

Ran into an issue today that thought figured out, but still didn't work...

Had an assembly line something like:

asmadd1 add ptra, ##640*100

But, using same code for two different cogs and they need some adjustments.
So, tried:

asmadd1:=0

(To make it a NOP)
in Spin2 before launching second cog into same code.
After some head banging, realized that the ## meant it was actually two lines of compiled assembly that need to be zeroed (made into NOP)

So, tried adding things like:

long[@asmadd1+1]:=0

But, this didn't seem to work...

Eventually, just defined a new register to hold the ##640*100 and zeroed that.
This worked as expected...

Now wondering if all compilers handle this situation the same way.
Maybe if something like what was tried first worked in SpinTools, wouldn't in FlexProp or PNut?

Comments

  • Wuerfel_21Wuerfel_21 Posts: 5,559

    @Rayman said:
    So, tried adding things like:

    long[@asmadd1+1]:=0

    That doesn't work because you're offsetting by one byte instead of one long. You need to make it "+4" or just asmadd1[1]:=0 (yes that works even if it's not declared as an array explicitly. Such is Spin)

  • JonnyMacJonnyMac Posts: 9,450
    edited 2025-09-15 21:57

    Could you use a flag (Z or C) and an if_x conditional to force the instructions to NOPs?

  • RaymanRayman Posts: 15,618

    @Wuerfel_21 Yes, that was the problem, see it now...

    @JonnyMac Interesting question... Think P1 had a WR (write result flag), but not seeing that here...

  • evanhevanh Posts: 16,712
    edited 2025-09-15 23:11

    @JonnyMac said:
    Could you use a flag (Z or C) and an if_x conditional to force the instructions to NOPs?

    That became the assembly _RET_ modifier on the Prop2. It was deemed more useful than a million variants of NOP.

    @Rayman said:
    ... Think P1 had a WR (write result flag), but not seeing that here...

    That was removed to make room for more opcodes.

  • RaymanRayman Posts: 15,618

    Wonder how that worked out in the end…
    Are 50% codes still free?

  • evanhevanh Posts: 16,712
    edited 2025-09-16 01:14

    @Rayman said:
    Wonder how that worked out in the end…
    Are 50% codes still free?

    There was two full dual-operand slots free in the end I think. Err, no, those don't have WC/WZ modifiers.
    In fact, looking at the instruction sheet I see now there was a lot of compromises on what could have the WC/WZ modifiers so as to fit in many more instructions.

  • Wuerfel_21Wuerfel_21 Posts: 5,559

    There's a few alternate NOP encodings that could be pillaged for more opcode space, such as CMP D,S (no WC/WZ).

    I think I said that elsewhere but my #1 wish for a new silicon rev. would be a fast-er 32 bit multiply (if it was 6 cycles, that'd be nice) and a SCAS without the right shift (or even a 2x16 packed sum of products thing)
    Also maybe a nibble reverse ($1234578 <> $87654321) would be nice, but that fits nicely as a D-only opcode.

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