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What is the maximum frequency you can put into the XI pin ? — Parallax Forums

What is the maximum frequency you can put into the XI pin ?

BeanBean Posts: 8,129
in Propeller 2
Does anyone know what the maximum frequency you can apply to the XI pin of the P2 ?
For example if I have a 100MHz oscillator with a square wave output, can I run that directly into the P2 to clock it ? Or do I need to divide it down ?

I have been waiting for the Rev C chip to start back on my P2 learning.
So I'm sure I will have many questions, because I have not really been following what has been going on.

Also, I saw on the website it says the maximum "recommended" system clock was 180MHz.
I though the P2 could go to something like 320MHz ?
I am running the Rev C Eval board at 250MHz with no issues that I can tell. Am I stressing the chip too much ?

Thanks,
Bean

Comments

  • msrobotsmsrobots Posts: 3,704
    I think you can run a 100Mhz one, the clock settings allow to scale up and down so you just do the math right.

    The 180 Mhz where recommended/proposed by OnSemi actual testing seems to show that up to 320 Mhz work well if kept at room temperature.

    So 250 Mhz should not be a problem.

    I do not know if somebody tested it with active cooling, might be interesting how high one can clock it before it dies. Won't test with mine...

    Mike
  • cgraceycgracey Posts: 14,133
    You should be able to drive any frequency into the XI pin. If the period becomes so short that the P2 chip can't keep up, nothing bad is going to happen. Same if it self-heats, you're not going to hurt it.
  • evanhevanh Posts: 15,214
    320 MHz should be a safe all-round maximum. If you are happy to limit the temperature range to say 55 °C then 350 MHz becomes reasonable and even 400 MHz is possible below something like 10 °C. Be wary, if burning the watts with heavy hubRAM, cogs and cordic use while overclocking then die temperature can rise well above ambient.
  • Cluso99Cluso99 Posts: 18,069
    I found catastrophic instruction failure at IIRC 385MHz. Basic simple code failure with one or two cogs. Room temp was around 20C.
  • evanhevanh Posts: 15,214
    edited 2020-10-03 20:49
    Sounds right, the die temperature is the ultimate limit.

  • Martin HodgeMartin Hodge Posts: 1,246
    Cluso99 wrote: »
    I found catastrophic instruction failure at IIRC 385MHz. Basic simple code failure with one or two cogs. Room temp was around 20C.

    Was that 385MHz fed directly into the XI pin or using internal multipliers?

  • evanhevanh Posts: 15,214
    Cluso would have been using the internal PLL. Indications are the external inputs are good for it for though. I've pushed the general I/O up 400 MHz before so don't see why the XI input can't do the same.

  • Cluso99Cluso99 Posts: 18,069
    Yes Evan.
    Using 20MHz xtal on P2-EVAL Rev B chip.
  • evanhevanh Posts: 15,214
    edited 2020-10-03 21:56
    It's interesting about stability when on the PLL with revB/C silicon. I think I've hit crash conditions but not sure what they were now. Most instructions are stable no matter what you do because the PLL itself thermally limits the clock frequency low enough to prevent crashes. This was a deliberate change for the revB silicon. RevA silicon did lockup and crash easy when pushing the overclocking.

    That very self-limiting can throw out timing calculations though. For example, the baud calculation of a diagnostic comport will be wrong, resulting in the bit rate wandering off target and producing garbage to the receiving UART. The prop2 is still just fine, no crash.

  • BeanBean Posts: 8,129
    Thanks for the info.
    You guy are great.

    Bean
  • evanhevanh Posts: 15,214
    evanh wrote: »
    Indications are the external inputs are good for it for though. I've pushed the general I/O up 400 MHz before so don't see why the XI input can't do the same.
    Oops, I got that wrong, sorry. I've had 400 million transitions per second on the general I/O, not 400 MHz. 400 MHz is 800 million transitions per second. XI is unlikely to get anywhere near 400 MHz.

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