P2 Tips, Tricks & Caveats

Comments

• Cluso99 Posts: 18,071

  2014-03-14 14:31 edited 2014-03-14 14:31

  IIRC, Z & C are set differently on SHR, SHL, ROR, ROL, RCR, RCL & others than they were on P1 ???
  They are set from the result rather than the source???
• Cluso99 Posts: 18,071

  2014-03-14 14:33 edited 2014-03-14 14:33

  WAIT D/#
  
  Does not flush the pipeline. It acts as a multiple clock instruction rather than "x" single clock instructions.
  
  This difference can be important in multiple tasks and threads where the pipeline needs to be flushed under certain conditions.
  
  (more explanation needed later)
  http://forums.parallax.com/showthread.php/154681-NOP-vs-WAIT-as-pipeline-fillers?p=1250717&viewfull=1#post1250717
• ozpropdev Posts: 2,793

  2014-03-14 16:17 edited 2014-03-14 16:17

  Here is some details on the PUSHZC and POPZC instructions.
  

  PUSHZC rotates ZC flags into D register bits 1:0.
  Bits 31:30 of D are rotated into ZC flags if WZ WC effect is included.
  
  +-----------> Z flag  ----+
  |                         |
  |  +------->  C flag  ------+
  |  |                      | |
  WZ WC                     | |
                            | | 
  ^  ^                      | |
  |  |                      V V
  
  31 30.................... 1 0
     <-----------------------
         rotated left x2
  
  
  POPZC rotates buts 0:1 of D register into ZC flags.
  ZC flags are rotated into Bits 31:30 of D if WZ WC effect is included.
  
  
  +------------ Z flag  <---+
  |                         |
  |  +--------  C flag  <-----+
  |  |                      | |
  |  |                     WZ WC
  |  |                      ^ ^ 
  |  |                      | |
  V  V                      | |
  
  31 30.................... 1 0 
     ----------------------->
        rotated right x2
  

      PUSHZC zc_reg
      INCMOD myreg,#13 wz,wc
      PUSHZC zc_reg
  

  
  In this example the lower 4 bits of zc_reg conatin the before and after ZC flags status. Very useful