Signed 16x18 pasm multiply

Comments

• lanternfish Posts: 366

  2013-09-23 03:21 edited 2013-09-23 03:21

  From a 2010 thread here rayman suggests multiplying two integers and then applying the sign. So I'm thinking make multiplier and multiplicand 18-bit.
  Of course there are more knowledgeable heads around here than me who may have a more appropriate solution.
• Ariba Posts: 2,694

  2013-09-23 06:26 edited 2013-09-23 06:26

  Here is a possible solution.
  
  The input is in registers signal (16bit) and coeff (18bit).
  The output is a 32bit result for the absolute part and the sign bit in a sign-register. (=33 bits together)
  
  This is just a draft and not tested!
  

  {
         shl signal,#16          'sign extend to long if needed
         sar signal,#16
  }
         mov sign,#0
         abs signal,signal  wc   '16bit sssssssssssssssss.fffffffffffffff
         rcl sign,#1
         abs coeff,coeff    wc   '18bit sssssssssssssssi.ffffffffffffffff
   if_c  xor sign,#1
  
         shl coeff,#15
         mov res,signal
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
         shr res,#1     wc
   if_c  add res,coeff
  
  ' now we have abs 32bit result in res-register: i.fffffffffffffffffffffffffffffff
  ' and sign in sign-register bit0
  

  Andy
  
  Edit: If you can make the signal 15 bits signed, or the coefficients only 17bits then the result would fit in one long.
• richaj45 Posts: 179

  2013-09-23 07:43 edited 2013-09-23 07:43

  Ariba:
  
  Yes reducing the sizes make thinks fit into 32 bits but i am doing audio filtering and more this is a bare minimum of bits as it is. When i do it in FPGA land i use 24-bits X 24-bits.
  
  Thanks for the code.
  
  regards,
  rich
• lonesock Posts: 917

  2013-09-23 10:10 edited 2013-09-23 10:10

  Assuming the filter coefficients don't change, you can save time by shifting through the filter coefficient once, and then accumulating 2 or 4 audio samples at the same time.

  shr coef, #1 wc
  if_c add accum1, sample1
       shl sample1, #1
  if_c add accum2, sample2
       shl sample2, #1
  if_c add accum3, sample3
       shl sample3, #1
  if_c add accum4, sample4
       shl sample4, #1
       'etc.
  

  Jonathan