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Prop II DE0-NANO Emulator PCB — Parallax Forums

Prop II DE0-NANO Emulator PCB

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  • SapiehaSapieha Posts: 2,964
    edited 2013-02-20 16:55
    Hi.

    Added .qsf file to first post
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-21 09:34
    Nice work - as always :)
  • SapiehaSapieha Posts: 2,964
    edited 2013-02-22 00:56
    Hi.

    Added - Revised Bill Of Materials by Bill Henning
  • David BetzDavid Betz Posts: 14,519
    edited 2013-02-22 11:34
    I got your board from Parallax today. It looks very nice! They also shipped some of the parts needed to build it. I'm a bit nervous about the SMT resistors but I'll give them a try. I also got a couple of fine-pitched headers that don't seem to go anywhere on either your board or the Nano itself. Can you tell me the minimum set of parts I need to install to use the SPI flash? Obviously, the flash chip itself and its bypass cap. Anything else?

    Edit: I guess the fine-pitched headers were a mistake. They should have been normal headers. Not a problem since I have some of those anyway.
  • SapiehaSapieha Posts: 2,964
    edited 2013-02-22 12:29
    Hi David

    On picture in attachment You will see what 5 parts needs for absolute minimum for use of Flash.

    To SMT resistors I remade one Tweezer that instead to be pressed it normally are closed --- I need open to place resistor in it -- and it hold resistor to time I open it again
    Then Solder DAC resistors on opposite sides -- inside not soldered before both rows are placed

    David Betz wrote: »
    I got your board from Parallax today. It looks very nice! They also shipped some of the parts needed to build it. I'm a bit nervous about the SMT resistors but I'll give them a try. I also got a couple of fine-pitched headers that don't seem to go anywhere on either your board or the Nano itself. Can you tell me the minimum set of parts I need to install to use the SPI flash? Obviously, the flash chip itself and its bypass cap. Anything else?

    Edit: I guess the fine-pitched headers were a mistake. They should have been normal headers. Not a problem since I have some of those anyway.
    PropII_NANO_3DT-2 Flash.jpg
    1024 x 628 - 94K
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-22 12:46
    Sapieha,

    I thought the two central 40 pin female headers have to be mounted on the bottom of the board?

    Good thing I have not finished soldering it up!
  • SapiehaSapieha Posts: 2,964
    edited 2013-02-22 12:50
    Hi Bill.

    This 3D picture in my previous post Show correct placement of all components

    Bill Henning wrote: »
    Sapieha,

    I thought the two central 40 pin female headers have to be mounted on the bottom of the board?

    Good thing I have not finished soldering it up!
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-22 13:00
    Thanks!

    I am about to start building the board...
    Sapieha wrote: »
    Hi Bill.

    This 3D picture in my previous post Show correct placement of all components
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-22 13:01
    David,

    The SchoolBoard 2 build manual at mikronauts.com/downloads shows one technique to solder SMT resistors without a stencil.
    David Betz wrote: »
    I got your board from Parallax today. It looks very nice! They also shipped some of the parts needed to build it. I'm a bit nervous about the SMT resistors but I'll give them a try. I also got a couple of fine-pitched headers that don't seem to go anywhere on either your board or the Nano itself. Can you tell me the minimum set of parts I need to install to use the SPI flash? Obviously, the flash chip itself and its bypass cap. Anything else?

    Edit: I guess the fine-pitched headers were a mistake. They should have been normal headers. Not a problem since I have some of those anyway.
  • David BetzDavid Betz Posts: 14,519
    edited 2013-02-22 13:21
    Thanks for the tips on soldering the SMT resistors and for the 3D diagram!
  • SapiehaSapieha Posts: 2,964
    edited 2013-02-22 13:26
    Hi David.

    No problem.

    If You have any question --- Simply ask --- That spare You problems

    David Betz wrote: »
    Thanks for the tips on soldering the SMT resistors and for the 3D diagram!
  • David BetzDavid Betz Posts: 14,519
    edited 2013-02-22 14:11
    David Betz wrote: »
    I got your board from Parallax today. It looks very nice! They also shipped some of the parts needed to build it. I'm a bit nervous about the SMT resistors but I'll give them a try. I also got a couple of fine-pitched headers that don't seem to go anywhere on either your board or the Nano itself. Can you tell me the minimum set of parts I need to install to use the SPI flash? Obviously, the flash chip itself and its bypass cap. Anything else?

    Edit: I guess the fine-pitched headers were a mistake. They should have been normal headers. Not a problem since I have some of those anyway.
    Hmmm... Looks like I don't have any spare female headers. I'll have to try Radio Shack or a local surplus electronics place nearby.
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-22 17:14
    Digikey should have them, and if you order before noon, you will usually get the order next day.

    I should have mine finished tomorrow; I have all the 0805 resistors mounted now.
  • David BetzDavid Betz Posts: 14,519
    edited 2013-02-22 17:48
    Bill Henning wrote: »
    Digikey should have them, and if you order before noon, you will usually get the order next day.

    I should have mine finished tomorrow; I have all the 0805 resistors mounted now.
    I guess if I'm going to order the headers I may as well order the rest of the parts that Parallax didn't send me like the buttons. I'll have to do an inventory.
  • cgraceycgracey Posts: 14,279
    edited 2013-02-22 19:11
    For the R-2R DACs, I used 47 ohms for the R resistors and 82 ohms for the 2R resistors from the FPGA pins, since the internal pin impedance is 12 ohms at 3.3V (82+12=94, which is 2*47). You guys might want to use those same values on Sapieha's board. Meanwhile, I need to make a configuration file for it.
  • SapiehaSapieha Posts: 2,964
    edited 2013-02-22 19:34
    Hi Chip.

    Thanks.

    Good I don't soldered my resistors -- But now I need buy that ones You describe

    cgracey wrote: »
    For the R-2R DACs, I used 47 ohms for the R resistors and 82 ohms for the 2R resistors from the FPGA pins, since the internal pin impedance is 12 ohms at 3.3V (82+12=94, which is 2*47). You guys might want to use those same values on Sapieha's board. Meanwhile, I need to make a configuration file for it.
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-23 10:28
    Thanks for the info Chip.

    Too bad I finished soldering all the resistors.

    Correct me if I am wrong, but using 65R/110R resistors for the ladder will still give a viewable signal - but at a lower brightness? (I am guesstimating 20%-30% dimmer)
    cgracey wrote: »
    For the R-2R DACs, I used 47 ohms for the R resistors and 82 ohms for the 2R resistors from the FPGA pins, since the internal pin impedance is 12 ohms at 3.3V (82+12=94, which is 2*47). You guys might want to use those same values on Sapieha's board. Meanwhile, I need to make a configuration file for it.
  • cgraceycgracey Posts: 14,279
    edited 2013-02-23 12:43
    Bill Henning wrote: »
    Thanks for the info Chip.

    Too bad I finished soldering all the resistors.

    Correct me if I am wrong, but using 65R/110R resistors for the ladder will still give a viewable signal - but at a lower brightness? (I am guesstimating 20%-30% dimmer)

    It's worse than that. I measured the intrinsic I/O pin resistance on the Cyclone IV device @3.3V at 12 ohms. So, The 2R component of the R-2R ladder must be 2R-12 to compensate for this pin resistance. If your R is 65 ohms, you'll need 2*65-12 (or 118) ohm resistors for the 2R values. If you keep the 110 ohm resistors, you could, instead, replace the 65 ohm resistors with (110+12)/2, or 61 ohm resistors. If you don't get the R-2R relationship as close as possible, the DACs will have monotonicity problems. The worst error occurs at the $0FF to $100 transition.
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-23 13:13
    Ugh.

    I guess I'll have to live with it on the one I assembled. I don't really want to rework it right now (plus I'll have to order more 0805 resistors).

    I should have waited longer to assemble it... but it was sitting there, tempting me!

    Thanks for the corrected values.
    cgracey wrote: »
    It's worse than that. I measured the intrinsic I/O pin resistance on the Cyclone IV device @3.3V at 12 ohms. So, The 2R component of the R-2R ladder must be 2R-12 to compensate for this pin resistance. If your R is 65 ohms, you'll need 2*65-12 (or 118) ohm resistors for the 2R values. If you keep the 110 ohm resistors, you could, instead, replace the 65 ohm resistors with (110+12)/2, or 61 ohm resistors. If you don't get the R-2R relationship as close as possible, the DACs will have monotonicity problems. The worst error occurs at the $0FF to $100 transition.
  • TubularTubular Posts: 4,727
    edited 2013-02-24 21:48
    Possibly slightly easier than reworking would be to manually solder 180 ohms across the top of the 65 ohms (gives 47.7 ohms), and 330 ohms across the 110's (makes 82.5 ohms)
    Bill Henning wrote: »
    Ugh.

    I guess I'll have to live with it on the one I assembled. I don't really want to rework it right now (plus I'll have to order more 0805 resistors).

    I should have waited longer to assemble it... but it was sitting there, tempting me!

    Thanks for the corrected values.
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-02-25 06:38
    Thanks Tubular, that would work too.

    Another possible fix I am considering is to use high speed (say 200MHz bandwidth) op-amps to let me adjust the gain/offset for each DAC channel... a nice cheap quad op-amp in a DIP package with some pots and caps.

    It seems like that may be less rework/soldering, and would allow for a lot of flexibility.
    Tubular wrote: »
    Possibly slightly easier than reworking would be to manually solder 180 ohms across the top of the 65 ohms (gives 47.7 ohms), and 330 ohms across the 110's (makes 82.5 ohms)
  • cgraceycgracey Posts: 14,279
    edited 2013-03-07 14:18
    Here are the FPGA configuration file and pinout list for Sapieha's DE0-Nano Prop2 emulation board:

    Sapieha_DE0_Nano_Config.zip
    Pinout for Sapieha's DE0-Nano Prop2 emulation board
---------------------------------------------------

PIN_A8 -to RESn

PIN_D3 -to P[0]
PIN_C3 -to P[1]
PIN_A2 -to P[2]
PIN_A3 -to P[3]
PIN_B3 -to P[4]
PIN_B4 -to P[5]
PIN_A4 -to P[6]
PIN_B5 -to P[7]
PIN_A5 -to P[8]
PIN_D5 -to P[9]
PIN_B6 -to P[10]
PIN_A6 -to P[11]
PIN_B7 -to P[12]
PIN_D6 -to P[13]
PIN_A7 -to P[14]
PIN_C6 -to P[15]
PIN_C8 -to P[16]
PIN_E6 -to P[17]
PIN_E7 -to P[18]
PIN_D8 -to P[19]
PIN_E8 -to P[20]
PIN_F8 -to P[21]
PIN_F9 -to P[22]
PIN_E9 -to P[23]
PIN_C9 -to P[24]
PIN_D9 -to P[25]
PIN_E11 -to P[26]
PIN_E10 -to P[27]
PIN_C11 -to P[28]
PIN_B11 -to P[29]
PIN_A12 -to P[30]
PIN_D11 -to P[31]

PIN_B16 -to P[32]
PIN_C14 -to P[33]
PIN_C16 -to P[34]
PIN_C15 -to P[35]
PIN_D16 -to P[36]
PIN_D15 -to P[37]
PIN_A10 -to P[38] ...... ADC on board
PIN_B10 -to P[39] ...... ADC on board
PIN_B14 -to P[40] ...... ADC on board
PIN_A9 --to P[41] ...... ADC on board    (input only)
PIN_G5 --to P[42] ...... G_SENSOR_CS_N
PIN_M2 --to P[43] ...... G_SENSOR_INT    (input only)
PIN_F2 --to P[44] ...... I2C_SCLK
PIN_F1 --to P[45] ...... I2C_SDAT
PIN_M16 -to P[46] ...... SW3             (input only)
PIN_T9 --to P[47] ...... SW4             (input only)
PIN_G2  -to P[48] ...... sdram_d[0]  NOTE: signals to/from sdram_xxx are delayed by one
PIN_G1  -to P[49] ...... sdram_d[1]        clock to simulate SDRAM pin mode on the Prop2
PIN_L8  -to P[50] ...... sdram_d[2]
PIN_K5  -to P[51] ...... sdram_d[3]
PIN_K2  -to P[52] ...... sdram_d[4]
PIN_J2  -to P[53] ...... sdram_d[5]
PIN_J1  -to P[54] ...... sdram_d[6]
PIN_R7  -to P[55] ...... sdram_d[7]
PIN_T4  -to P[56] ...... sdram_d[8]
PIN_T2  -to P[57] ...... sdram_d[9]
PIN_T3  -to P[58] ...... sdram_d[10]
PIN_R3  -to P[59] ...... sdram_d[11]
PIN_R5  -to P[60] ...... sdram_d[12]
PIN_P3  -to P[61] ...... sdram_d[13]
PIN_N3  -to P[62] ...... sdram_d[14]
PIN_K1  -to P[63] ...... sdram_d[15]

PIN_P2  -to P[64] ...... sdram_a[0]
PIN_N5  -to P[65] ...... sdram_a[1]
PIN_N6  -to P[66] ...... sdram_a[2]
PIN_M8  -to P[67] ...... sdram_a[3]
PIN_P8  -to P[68] ...... sdram_a[4]
PIN_T7  -to P[69] ...... sdram_a[5]
PIN_N8  -to P[70] ...... sdram_a[6]
PIN_T6  -to P[71] ...... sdram_a[7]
PIN_R1  -to P[72] ...... sdram_a[8]
PIN_P1  -to P[73] ...... sdram_a[9]
PIN_N2  -to P[74] ...... sdram_a[10]
PIN_N1  -to P[75] ...... sdram_a[11]
PIN_L4  -to P[76] ...... sdram_a[12]
PIN_M7  -to P[77] ...... sdram_ba[0]
PIN_M6  -to P[78] ...... sdram_ba[1]
PIN_R6  -to P[79] ...... sdram_dqm[0]
PIN_T5  -to P[80] ...... sdram_dqm[1]
PIN_L1  -to P[81] ...... sdram_cas
PIN_L2  -to P[82] ...... sdram_ras
PIN_C2  -to P[83] ...... sdram_we
PIN_P6  -to P[84] ...... sdram_cs
PIN_L7  -to P[85] ...... sdram_cke
PIN_D14 -to P[86]
PIN_F15 -to P[87]
PIN_F16 -to P[88]
PIN_F14 -to P[89]
PIN_G16 -to P[90]
PIN_G15 -to P[91]

PIN_P14 -to DAC[35] ...... MSB of DAC3
PIN_L14 -to DAC[34]
PIN_N14 -to DAC[33]
PIN_M10 -to DAC[32]
PIN_L13 -to DAC[31]
PIN_J16 -to DAC[30]
PIN_K15 -to DAC[29]
PIN_J13 -to DAC[28]
PIN_J14 -to DAC[27]
PIN_L16 -to DAC[26] ...... MSB of DAC2
PIN_K16 -to DAC[25]
PIN_R16 -to DAC[24]
PIN_L15 -to DAC[23]
PIN_P15 -to DAC[22]
PIN_P16 -to DAC[21]
PIN_R14 -to DAC[20]
PIN_N16 -to DAC[19]
PIN_N15 -to DAC[18]
PIN_T11 -to DAC[17] ...... MSB of DAC1
PIN_T10 -to DAC[16]
PIN_R11 -to DAC[15]
PIN_P11 -to DAC[14]
PIN_R10 -to DAC[13]
PIN_N12 -to DAC[12]
PIN_P9  -to DAC[11]
PIN_N9  -to DAC[10]
PIN_N11 -to DAC[9]
PIN_F13 -to DAC[8]  ...... MSB of DAC0
PIN_T15 -to DAC[7]
PIN_T14 -to DAC[6]
PIN_T13 -to DAC[5]
PIN_R13 -to DAC[4]
PIN_T12 -to DAC[3]
PIN_R12 -to DAC[2]
PIN_D12 -to DAC[1]
PIN_B12 -to DAC[0]

PIN_A14 -to clkout ......clkout/clkin form the PLL loop and must be connected
PIN_E16 -to clkin        by jumpering pins 3 and 5 on the 2x13 header

** NO ROOM FOR THIS PIN: PIN_E15 .......SW1 ....... Input only

    Note: the PIN_XXX notations are for Sapieha, mainly, so he can see where the signals were routed to all parts of his board, as well as signals internal to the DE0-Nano board.
    zip
    zip
    Sapieha_DE0_Nano_Config.zip
    296K
  • Bill HenningBill Henning Posts: 6,445
    edited 2013-03-07 15:49
    Thanks Chip!
  • SapiehaSapieha Posts: 2,964
    edited 2013-03-07 17:14
    Thanks Chip

    Now I need only find differences.

    ** NO ROOM FOR THIS PIN: PIN_E15 .......SW1 ....... Input only" -- In PM You write to me SW2?
  • TubularTubular Posts: 4,727
    edited 2013-03-07 19:52
    Sapieha wrote: »
    Thanks Chip

    Now I need only find differences.

    ** NO ROOM FOR THIS PIN: PIN_E15 .......SW1 ....... Input only" -- In PM You write to me SW2?

    Hi Sapieha

    I'm not sure what differences you are looking for, but I noted there is perhaps some confusion with the switches.

    The tiny bank of 4 switches on the DE0 is (according to terasic DE0 manual) wired to pins M1, T8, B9, M15 (SW[0]..SW[3]).

    By contrast Altera pin M16 breaks out to JP1 pin 1 (40 way header), this is what Chip calls SW3
    and Altera pin T9 breaks out to JP3 pin 4 (26 way header on back of DE0), Chip calls SW4

    I think the most likely explanation is a wrong pin base, in which case
    SW[3] is on M15 (not M16) and
    SW[1] is on T8 (not T9)

    There are other posisble explanations, such as external switches, or an error in the manual or in the code list.

    While we're at it, pin functions for the ADC128S022. There are 8 analog inputs coming into the 26 pin header JP3.
    PIN_A10 -to P[38] ... ADC CS Chip Select
    PIN_B10 -to P[39] ... ADC SADDR ("D IN" on ADC)
    PIN_B14 -to P[40] ... ADC SCLK clock signal
    PIN_A9 -to P[41] ... ADC SDAT data ("D OUT" on ADC)

    The other stuff - SDRAM, Accelerometer, I2C, all looks fine.
  • SapiehaSapieha Posts: 2,964
    edited 2013-03-07 20:50
    Hi Tubular.

    It is not SW's on NANO --- It is SW's on my PCB.
    And I found all and why --- On my PCB SW[1..2] can't be used --- This pins on Emulation are used for other proposes.

    Tubular wrote: »
    Hi Sapieha

    I'm not sure what differences you are looking for, but I noted there is perhaps some confusion with the switches.

    The tiny bank of 4 switches on the DE0 is (according to terasic DE0 manual) wired to pins M1, T8, B9, M15 (SW[0]..SW[3]).

    By contrast Altera pin M16 breaks out to JP1 pin 1 (40 way header), this is what Chip calls SW3
    and Altera pin T9 breaks out to JP3 pin 4 (26 way header on back of DE0), Chip calls SW4

    I think the most likely explanation is a wrong pin base, in which case
    SW[3] is on M15 (not M16) and
    SW[1] is on T8 (not T9)

    There are other posisble explanations, such as external switches, or an error in the manual or in the code list.

    While we're at it, pin functions for the ADC128S022. There are 8 analog inputs coming into the 26 pin header JP3.
    PIN_A10 -to P[38] ... ADC CS Chip Select
    PIN_B10 -to P[39] ... ADC SADDR ("D IN" on ADC)
    PIN_B14 -to P[40] ... ADC SCLK clock signal
    PIN_A9 -to P[41] ... ADC SDAT data ("D OUT" on ADC)

    The other stuff - SDRAM, Accelerometer, I2C, all looks fine.
  • SapiehaSapieha Posts: 2,964
    edited 2013-03-07 20:56
    Hi All.

    Pin List to my version of NANO - P2 emulation PCB.

    http://forums.parallax.com/showthread.php/145063-Sapeiha-s-Propeller-2-Base-Boards-DEO-Nano-Single-Cog-Emulator

    Posted as code and attachment.

    Pin List edited on G_sensor and EEProm part
        PIN_A8 -to RESn (SW-Reset and PropPlug)

_______ Extention's 40 pin connector ______________
PIN_D3 -to P[0]   -- Same
PIN_C3 -to P[1]
PIN_A2 -to P[2]
PIN_A3 -to P[3]
PIN_B3 -to P[4]
PIN_B4 -to P[5]
PIN_A4 -to P[6]
PIN_B5 -to P[7]
PIN_A5 -to P[8]
PIN_D5 -to P[9]
PIN_B6 -to P[10]
PIN_A6 -to P[11]
PIN_B7 -to P[12]
PIN_D6 -to P[13]
PIN_A7 -to P[14]
PIN_C6 -to P[15]
PIN_C8 -to P[16]
PIN_E6 -to P[17]
PIN_E7 -to P[18]
PIN_D8 -to P[19]
PIN_E8 -to P[20]
PIN_F8 -to P[21]
PIN_F9 -to P[22]
PIN_E9 -to P[23]
PIN_C9 -to P[24]
PIN_D9 -to P[25]
PIN_E11 -to P[26]
PIN_E10 -to P[27]
PIN_C11 -to P[28]
PIN_B11 -to P[29]
PIN_A12 -to P[30]
PIN_D11 -to P[31]  -- Same

___________ uSD ______________________________
PIN_B16 -to P[32]  -- PCB-JP3 pin11 -- uSD /CS
PIN_C14 -to P[33]  -- PCB-JP3 pin10 -- uSD SCK
PIN_C16 -to P[34]  -- PCB-JP3 pin9  -- uSD SI
PIN_C15 -to P[35]  -- PCB-JP3 pin8  -- uSD SO

___________ PS2 ____________________________________
PIN_D16 -to P[36]  -- PCB-JP3 uSD   -- PS2 .... SCK
PIN_D15 -to P[37]  -- PCB-JP3 uSD   -- PS2 .... DATA
    
___________ NANO onboard ADC _______________________
PIN_A10 -to P[38] ...... ADC_CS_N   pin1
PIN_B10 -to P[39] ...... ADC_SADDR  pin14
PIN_B14 -to P[40] ...... ADC_SCLK   pin15
PIN_A9 --to P[41] ...... ADC_SDAT   pin16    (input only)

___________ NANO onboard G_SENSOR and EEProm _______________
PIN_G5 --to P[42] ...... G_SENSOR_CS_N
PIN_M2 --to P[43] ...... G_SENSOR_INT    (input only)
PIN_F2 --to P[44] ...... I2C_SCLK ---- (G_Sensor and EEPROM) -- EEPROM I2C ADDRESS W/R = 0xA0/0xA1
PIN_F1 --to P[45] ...... I2C_SDAT ---- (G_Sensor and EEPROM) -- EEPROM I2C ADDRESS W/R = 0xA0/0xA1
    
______________ SW[3..4] ____________________________________
    PIN_M16 -to P[46]   -- PCB-JP3 pin4 ............SW3
    PIN_T9 --to P[47]   -- PCB-JP2 pin1 ............SW4
__________SDRAM____________________
PIN_G2  -to P[48] ...... sdram_d[0]  NOTE: signals to/from sdram_xxx are delayed by one
PIN_G1  -to P[49] ...... sdram_d[1]        clock to simulate SDRAM pin mode on the Prop2
PIN_L8  -to P[50] ...... sdram_d[2]
PIN_K5  -to P[51] ...... sdram_d[3]
PIN_K2  -to P[52] ...... sdram_d[4]
PIN_J2  -to P[53] ...... sdram_d[5]
PIN_J1  -to P[54] ...... sdram_d[6]
PIN_R7  -to P[55] ...... sdram_d[7]
PIN_T4  -to P[56] ...... sdram_d[8]
PIN_T2  -to P[57] ...... sdram_d[9]
PIN_T3  -to P[58] ...... sdram_d[10]
PIN_R3  -to P[59] ...... sdram_d[11]
PIN_R5  -to P[60] ...... sdram_d[12]
PIN_P3  -to P[61] ...... sdram_d[13]
PIN_N3  -to P[62] ...... sdram_d[14]
PIN_K1  -to P[63] ...... sdram_d[15]

PIN_P2  -to P[64] ...... sdram_a[0]
PIN_N5  -to P[65] ...... sdram_a[1]
PIN_N6  -to P[66] ...... sdram_a[2]
PIN_M8  -to P[67] ...... sdram_a[3]
PIN_P8  -to P[68] ...... sdram_a[4]
PIN_T7  -to P[69] ...... sdram_a[5]
PIN_N8  -to P[70] ...... sdram_a[6]
PIN_T6  -to P[71] ...... sdram_a[7]
PIN_R1  -to P[72] ...... sdram_a[8]
PIN_P1  -to P[73] ...... sdram_a[9]
PIN_N2  -to P[74] ...... sdram_a[10]
PIN_N1  -to P[75] ...... sdram_a[11]
PIN_L4  -to P[76] ...... sdram_a[12]
PIN_M7  -to P[77] ...... sdram_ba[0]
PIN_M6  -to P[78] ...... sdram_ba[1]
PIN_R6  -to P[79] ...... sdram_dqm[0]
PIN_T5  -to P[80] ...... sdram_dqm[1]
PIN_L1  -to P[81] ...... sdram_cas
PIN_L2  -to P[82] ...... sdram_ras
PIN_C2  -to P[83] ...... sdram_we
PIN_P6  -to P[84] ...... sdram_cs
PIN_L7  -to P[85] ...... sdram_cke
_______ Flash - PropPug ___________
PIN_D14 -to P[86]  -- PCB-JP3 pin12   -- Flash .... SO
PIN_F15 -to P[87]  -- PCB-JP3 pin13   -- Flash .... SI
PIN_F16 -to P[88]  -- PCB-JP3 pin14   -- Flash .... SCK
PIN_F14 -to P[89]  -- PCB-JP3 pin15   -- Flash .... /CS
PIN_G16 -to P[90]  -- PCB-JP3 pin16   -- PropPlug RX
PIN_G15 -to P[91]  -- PCB-JP3 pin17   -- PropPlug TX



PIN_F13 -to DAC_0[8]  ...... MSB of DAC0
PIN_T15 -to DAC_0[7]
PIN_T14 -to DAC_0[6]
PIN_T13 -to DAC_0[5]
PIN_R13 -to DAC_0[4]
PIN_T12 -to DAC_0[3]
PIN_R12 -to DAC_0[2]
PIN_D12 -to DAC_0[1]
PIN_B12 -to DAC_0[0]

PIN_T11 -to DAC_1[17] ...... MSB of DAC1
PIN_T10 -to DAC_1[16]
PIN_R11 -to DAC_1[15]
PIN_P11 -to DAC_1[14]
PIN_R10 -to DAC_1[13]
PIN_N12 -to DAC_1[12]
PIN_P9  -to DAC_1[11]
PIN_N9  -to DAC_1[10]
PIN_N11 -to DAC_1[9]

PIN_L16 -to DAC_2[26] ...... MSB of DAC2
PIN_K16 -to DAC_2[25]
PIN_R16 -to DAC_2[24]
PIN_L15 -to DAC_2[23]
PIN_P15 -to DAC_2[22]
PIN_P16 -to DAC_2[21]
PIN_R14 -to DAC_2[20]
PIN_N16 -to DAC_2[19]
PIN_N15 -to DAC_2[18]

PIN_P14 -to DAC_3[35] ...... MSB of DAC3
PIN_L14 -to DAC_3[34]
PIN_N14 -to DAC_3[33]
PIN_M10 -to DAC_3[32]
PIN_L13 -to DAC_3[31]
PIN_J16 -to DAC_3[30]
PIN_K15 -to DAC_3[29]
PIN_J13 -to DAC_3[28]
PIN_J14 -to DAC_3[27]

________________________ Reserved -- Not used __________________________________________________________________________

    PIN_A14 -to PLL_O .............. JP3 -- GPIO_20 -- PCB pin5-IO_79 ..(Old VGA sync --- Need be cut with WGA connector)
    WGA pin14 --- Need slodernig wire with possibility to connect to one of P[0..31] pin of 40 pin Extention connector
    
    PIN_E15  -- PCB-JP3 pin2 ............SW1 _____....._____ Not used
    
    PIN_E16 -to SW2_PLL_I .......... JP3 -- GPIO_2_IN1 -- PCB pin3 (SW2 don't use)
    txt
    txt
    NANO pin List.txt
    5K
  • SapiehaSapieha Posts: 2,964
    edited 2013-03-07 22:44
    Hi ALl.

    Pin List edited on G_sensor and EEProm part.
    Added -- EEPROM I2C ADDRESS W/R = 0xA0/0xA1 to dual usage of I2C bus
  • SapiehaSapieha Posts: 2,964
    edited 2013-03-08 03:03
    Hi Chip.

    One question I forgot to ask --- Have we still 32Kb RAM --- Else You use now all available ?

    cgracey wrote: »
    Here are the FPGA configuration file and pinout list for Sapieha's DE0-Nano Prop2 emulation board:

    Sapieha_DE0_Nano_Config.zip

    Note: the PIN_XXX notations are for Sapieha, mainly, so he can see where the signals were routed to all parts of his board, as well as signals internal to the DE0-Nano board.
  • cgraceycgracey Posts: 14,279
    edited 2013-03-08 10:31
    Sapieha wrote: »
    Hi Chip.

    One question I forgot to ask --- Have we still 32Kb RAM --- Else You use now all available ?

    For the DE0-Nano, there's 32KB of hub RAM. On the DE2-115 you get the whole 128KB.
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