Help porting to PASM
Would any one be willing to help port this little chunk of spin to PASM? I would owe you one. 
CON
SCLK_IN = 5
DIN = 6
LOAD_IN = 4
VAR
long Cog
long InputBits
long stack[64]
PUB Start(InputState) : Okay
stop
Okay := Cog := cognew(main(InputState),@stack) + 1
PUB stop
'' Stop switch driver - frees a cog
if cog
cogstop(cog~ - 1)
PRI Main(InputState) | tmp
'Setup register control bits
outa[SCLK_IN]~~
outa[LOAD_IN]~~
dira[DIN]~
dira[SCLK_IN]~~
dira[LOAD_IN]~~
repeat
outa[LOAD_IN]~
outa[LOAD_IN]~~
repeat 8
tmp := tmp << 1
tmp := tmp ^ ina[DIN]
outa[SCLK_IN]~
outa[SCLK_IN]~~
inputbits := tmp >< 8
bytemove(Inputstate,@inputbits,1)

Comments
VAR long cog PUB Start(InputState) : okay stop okay := cog := cognew (@entrypoint, InputState) + 1 PUB stop '' Stop switch driver - frees a cog if cog cogstop (cog~ - 1) DAT org 0 entrypoint mov inputstate_addr, par ' save our parameter or outa, SCLK_IN ' setting up pins state and directions or outa, LOAD_IN andn dira, DIN or dira, SCLK_IN or dira, LOAD_IN :loop andn outa, LOAD_IN ' toggle LOAD_IN nop ' slow down a little to 100ns pulse or outa, LOAD_IN mov n, #8 ' loop count :bitloop test DIN, ina wc ' test input bit (ina doesn't work as destination, note), carry = parity = the bit rcl tmp, #1 ' shift carry into tmp andn outa, SCLK_IN ' toggle SCLK_IN nop ' slow down a little to 100ns pulse or outa, SCLK_IN djnz n, #:bitloop rev tmp, #24 ' reverse bottom 8 bits wrbyte tmp, inputstate_addr ' store into hub ram jmp #:loop ' loop forever SCLK_IN long 1<<5 ' pin mask values DIN long 1<<6 LOAD_IN long 1<<4 inputstate_addr res 1 tmp res 1 n res 1thanks again.
Is this a way to fix the program?
VAR long cog, InputSPtr PUB Start(InputState) : okay InputSPtr := InputState stop okay := cog := cognew (@entrypoint, @InputSPtr) + 1 PUB stop '' Stop switch driver - frees a cog if cog cogstop (cog~ - 1) DAT org 0 entrypoint rdlong inputstate_addr, par ' save our parameter or outa, SCLK_IN ' setting up pins state and directions or outa, LOAD_IN andn dira, DIN or dira, SCLK_IN or dira, LOAD_IN :loop andn outa, LOAD_IN ' toggle LOAD_IN nop ' slow down a little to 100ns pulse or outa, LOAD_IN mov n, #8 ' loop count :bitloop test DIN, ina wc ' test input bit (ina doesn't work as destination, note), carry = parity = the bit rcl tmp, #1 ' shift carry into tmp andn outa, SCLK_IN ' toggle SCLK_IN nop ' slow down a little to 100ns pulse or outa, SCLK_IN djnz n, #:bitloop rev tmp, #24 ' reverse bottom 8 bits wrbyte tmp, inputstate_addr ' store into hub ram jmp #:loop ' loop forever SCLK_IN long 1<<5 ' pin mask values DIN long 1<<6 LOAD_IN long 1<<4 inputstate_addr res 1 tmp res 1 n res 1Move the address received by Start into a long which is then read by the PASM section?
I'm pretty sure I wouldn't have caught the error myself but once it's pointed out it's easier to see why it causes an error (like most problems).
It compiles.
Duane