Sink Input wrpin (PB_PinField, P_LOW_15K) pinlow(PB_PinField) Is there a Schematic for P2 Pin
Bob Drury
Posts: 236
in Propeller 2
1) The schematic I found has a dual totem pole FET's tied together to the P2 PIN , the first FET Totem Pole allows output High or Low enable, the second FET totem pole stack has a pull up enable going to a 10K resistor and a pull down enable goind to 10K resistor. The P_LOW_15K I would assume sets 15K . Is the FET being modulated to have different settings? I may have wrong PIN Schematic where would I find the smart PIN schematic ?
2) When setting up Pin's for Input why is there a pinlow(PB_PinField) command this seems to imply the first totem pole is tied to ground.
Comments
I need to make an accurate schematic, still. The ones that exist are best-guesses by people using the P2.
There are no series MOSFETs in the output drivers. All "high" drivers have PMOS devices with sources tied to the 3.3V rail and drains going to the pin, with resistors between the drain and pin for resistive drivers. All "low" drivers have NMOS devices with sources tied to GND in symmetrical paterns to the high drivers.
PINLOW() is a command for pin logic output. It sets DIR high and OUT low.
The only time you might want to use it as part of reading inputs is when setting up a pull-down first. To do a pull-down the pin has to be configured with a WRPIN to limit the output drive strength. Then the pin can still be toggled by an external signal and therefore have a changing input level.
That's where P_LOW_15K kicks in. You'd have something like:
wrpin( pinnum, P_LOW_15K ) 'Configure a low output as a 15 kR pull-down pinlow( pinnum ) 'Set the output low - Activating the pull-down .... 'can use PINREAD(pinnum) as an input. The 15 kR output pulls the input low if nothing else is pulling it high. ....Thanks evanh and cgracey
Looking forward to upcomming releases.