I decided to start a new thread on this topic instead of cluttering up the others we've been using.
Although the existing Catalina EEPROM loader does support up to 128KB EEPROMs, I'm hoping you'll give some thought to updating and modernizing its capability to support up to a full 512KB EEPROM map, just in case some crazy American comes along and writes code requiring that much space (slowly raising my hand
I guess the good news (at least for now) is that you won't have to consider going beyond the 512KB limit because the existing EEPROM device architecture only supports that much on a single I2C bus.
Anyway, for my testing and debugging I'm using two Propeller 1 Platforms: (1) A USB Project Board; and (2) A FLiP Module.
Here's a picture of the USB Project Board, which I modified by removing the existing 64KB EEPROM and replacing it with a 256KB one. (I've also added an additional 256KB EEPROM after this picture was taken for a final total of 512KB). Notice also the two SPI SRAM chips which operate in Quad Mode and execute my C code in XMM Memory:
However, this board is mainly used for software development and isn't meant to be deployed in the field. Because of this fact, I would like to focus the attention of this thread upon the FLiP module instead.
As we all know, the existing FLiP module comes with a 64KB EEPROM installed. For most users this appears to be a suitable accommodation, but for my application it's insufficient due to the fact my finished C code will likely fall between 128KB and 256KB in size.
My solution was to develop a Memory Board which the FLiP module will plug in to. The entire FLiP/Memory assembly would then plug into a socket on my main board.
Here's a side by side view of the Memory Board and the FLiP:
This Memory Board contains additional EEPROMs which extends the full EEPROM mapping on the I2C bus to 512KB. It also contains two SPI SRAMs, each operating in Quad Mode, to allow the FLiP to execute code in XMM Memory.
The upper three chips on the Memory Board are: one 64KB EEPROM, one 128KB EEPROM, and one 256KB EEPROM. The two lower chips are SPI SRAMs. There is a bypass capacitor adjacent to each of these five chips, and two pullup resistors for the I2C bus (SDA and SCL), and two pullup resistors for the SPI bus (CS and CLK). The Memory Board is powered from the 3.3V output of the FLiP module.
And here's the test arrangement with the FLiP plugged in to the Memory Board but not yet installed on the main board:
In my next post, I'll describe the overall EEPROM mapping arrangement, the problem I encountered with the Catalina EEPROM loader while attempting to store an XMM program while using it, and how I worked around it.
BTW, the SPI SRAM arrangement executes XMM code perfectly, so this portion of the Memory Board is not a subject of this thread.