wrlong newjmp,##$FFFC0 'set jmp to isr, instead of just reti0

Comments

• cgracey Posts: 14,133

  2016-09-10 22:24

  I see it on the 13th line:
  

  dat
  	orgh	0
  
  ' Set up fancy debug ISR for cog 0
  
  	org
  
  	wrlong	newjmp,##$FFFC0	'set jmp to isr, instead of just reti0
  
  	coginit	#0,#@start	'restart cog 0 with target program
  
  
  newjmp	jmp	#isr		'this jmp instruction goes at $FFFC0
  
  
  
  ' This program demonstrates single-stepping.
  ' You'll need to connect a logic analyzer to p4..p0.
  
  	org
  
  start	mov	ijmp1,#int1	'set interrupt vectors
  	mov	ijmp2,#int2
  	mov	ijmp3,#int3
  
  	getct	t1		'set initial ct1 event
  	addct1	t1,time1
  
  	getct	t2		'set initial ct2 event
  	addct2	t2,time2
  
  	getct	t3		'set initial ct3 event
  	addct3	t3,time3
  
  	setint1	#1		'ct1 interrupt on int1
  	setint2	#2		'ct2 interrupt on int2
  	setint3	#3		'ct3 interrupt on int3
  
  	mov	dira,#$1F	'make pins 4..0 outputs
  
  
  loop	outh	#4		'this routine is getting single-stepped
  bp	waitint
  	outl	#4
  	jmp	#loop
  
  int1	addct1	t1,time1	'int1..int3, all getting single-stepped
  	outn	#1
  	outn	#1
  	reti1
  
  int2	addct2	t2,time2
  	outn	#2
  	outn	#2
  	outn	#2
  	outn	#2
  	reti2
  
  int3	addct3	t3,time3
  	outn	#3
  	outn	#3
  	outn	#3
  	outn	#3
  	outn	#3
  	outn	#3
  	reti3
  
  
  time1	long	8000
  time2	long	8001
  time3	long	8002
  
  t1	res	1
  t2	res	1
  t3	res	1
  
  
  
  ' Put this fancy debug ISR into hub exec area
  
  	orgh	$400
  
  isr	outn	#0		'this is the single-step interrupt routine
  	outn	#0
  
  '	setbrk	##bp << 8 + $10	'enable address breakpoint
  	setbrk	#$0F		'enable single-stepping in main/int3/int2/int1
  
  	reti0
  
• rjo__ Posts: 2,114

  2016-09-11 13:06

  not in mine.... Hmmm
  
  thanks
• cgracey Posts: 14,133

  2016-09-11 13:36 edited 2016-09-11 13:51

  rjo__ wrote: »

  not in mine.... Hmmm
  
  thanks

  
  If you're like me, you might have fallen asleep with your hand on the mouse and wiped it out.