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RDLONG and WRLONG to the HUB from two different COGs — Parallax Forums

RDLONG and WRLONG to the HUB from two different COGs

Well, that about says it. But, to explain further. First of all I am coding in PROPBASIC. One COG is dedicated to the LCD display. It only RDLONG(s) data from a particular location(s) in the HUB in a continous DO/LOOP. These "location(s)" along with many others are listed before the "PROGRAM" start.

Now, in four other COG(s), there is also DO/LOOP(s) running gathering time and temperature data. This data is then being WRLONG to the same location(s) that the RDLONG above is "reading"

Question...what happens if a RDLONG and a WRLONG in two or three different COG(s) are to the same location in the HUB, happens at the exact same time? Does the data get corrupted? Or is it "first come, first serve"?

Thank you..


  • Cluso99Cluso99 Posts: 17,474
    edited 2021-01-29 18:53

    Access to the hub is 32 bits wide. If you do read or writes as words or bytes, then the extra bits just get ignored.

    Hub access is round robbin which means each cog can only access the same hub long address in a sequential manner. So for example $1000 ($1000-$1003) is given access to cog 0 on a clock cycle. Two clocks later its cog 1’s turn, etc.

    What this means is that no two cogs can access the same hub address on the same clock.

    So the quick answer, it will not be corrupted. It will depend on which cog wrote last before it gets read.

    There is a pic of the access currently on the left of these threads. Not sure if it will remain or get removed.

  • dennodenno Posts: 201

    Very good...I did forget about the clock cycles. Thank you..I was getting some goofy readings on the display, and thought that was the problem. I will go back and do some more research. Thanks again Cluso99

  • evanhevanh Posts: 10,429

    Cog2 is one clock cycle later than cog1. All eight cogs get a turn at the same hubRAM location within just eight clock cycles.

  • evanhevanh Posts: 10,429
    edited 2021-01-30 01:29

    [bah] [deleted babble]

  • If you're writing multiple longs to the hub, you might want to implement locks, so that an entire transfer can take place before the cog that reads it can act upon it.


  • Keep in mind that 'locks' don't actually lock the memory while your program reads or writes to hub memory locations. Think of them as global flags that indicate that a process is doing something and other processes should wait before performing certain operations. The propeller manual has some good information about locks. Could just be me but I had to study it carefully to get my head wrapped around how they worked.


  • evanhevanh Posts: 10,429
    edited 2021-01-30 03:06

    Yep, locks are cooperative in nature. They provide a formal way to serialise a sequence that will corrupt if allowed to become parallel.

    PS: Polled mail-boxing is often preferable. Use shadowed copies to detect changes to buffer pointers for example.

  • Cluso99Cluso99 Posts: 17,474

    Sorry but no. They are 2 clocks apart. Remember on P1 the whole loop takes 16 clocks, not 8 as in P2.

  • evanhevanh Posts: 10,429

    Oops, didn't notice this was prop1 forum. I'll blame the new forum software. ;)

  • evanhevanh Posts: 10,429

    Oh man, not even smilies work now.

  • banjobanjo Posts: 386


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