Idea for motor driver, ADC PWM control loop

I have an idea for a very simple power stage to drive stepper motors. I know there are ready-to-use ICs for this but as soon as you need more than 2A current or more than 36V they either become expensive or generate a lot of heat. Discrete MOSFETs are much better. A full bridge that can handle 50V and 4A without much cooling can be built for ~$1. Two full bridges are required to drive a stepper motor with 2 windings.

Since stepper motors are operated in current mode a feedback loop is required. For my servo project I use isolated current sensors which is handy when mains voltage is used directly. For small stepper motors this is overkill and would be far too expensive. Instead, current sensor shunt resistors are used. Theese have very little reistance (33 milli ohms for example) otherwise they would heat up too much at high currents. The low signal amplitude (100mV @ 3A) requires high resolution.

To avoid the need for external amplifiers my idea was to use the higher resolution modes of the built in ADCs of the P2. Their disadvantage is that they are not suited for auto calibration. Hence, they only work well if AC coupled and the DC offset can't be compensated easily. But I'm optimistic that this can be achieved with clever software.

Typical circuits use only one shunt resistor which is shared by both legs of the full bridge. However, this would cause problems in our case because at standstill and low speed the duty cycle is very low (only a few microseconds on time) and we wouldn't have enough time to measure current precisely. With two shunt resistors we always see more than 50% duty cycle because the current also flows through the resistors during the free-wheeling phase. One resistors costs less than $0.10 so this is no big problem.
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Comments

  • ManAtWorkManAtWork Posts: 844
    edited 2020-11-17 - 17:54:12
    If we use symetrical (triangle mode) PWM there are 4 phases with 3 different states:
    phase 1 state A: depending on polarity either T1 and T3 or T2 and T4 are conducting, current is rising
    phase 2 state B: T1 and T3 are conducting (free wheeling, lower circuit), current is falling (slow decay)
    phase 3 state A: same as phase 1
    phase 4 state C: T2 and T4 are conducting (free wheeling, upper circuit)

    At low RPM duty cycle is low, this means phase 1 and 3 are short and phase 2 and 4 use up almost 50% of the cycle time, each.

    At higher RPM there is an additional phase shift between current and voltage so that one of the phases 1 and 3 becomes a fast-decay phase where energy is transferred back to the power supply. Duty cycle increases so that phase 1 and 3 become longer and 2 and 4 shorter.

    Edit: in the diagram swap the "current at R1/R2" traces. Of course, current flows through R1 when T1 is on and not when T2 is on.
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  • The goal is to make a PID control loop using two ADC inputs and two PWM outputs and some software in between. The ADCs only see AC voltage but that should be no problem. The DC part is modulated with the PWM frequency and can be retrieved with demodulation (synchronous rectification).

    At very high speeds the duty cycle saturates because motor winding inductance and back EMF limit the current. The supply voltage is no longer high enough to overcome back EMF and losses so that the currrent is decreasing. At this point (high frequency) de-modulation is no longer possible because phase 1 and 3 (with the same state A) take up 100% of the time. But now we still have an AC signal. Instead of HF modulation we see the "baseband" LF signal with lower frequency. The "corner frequency" where duty cycle saturation happens is usually around 500Hz. PWM frequency is usually in the 16 to 25kHz range. So we need to make sure that our overall bandwidth covers the range from 200Hz to at least 100kHz to have some headroom for harmonics.

    I think the sample frequency should be in the 1MHz range. To get higher resolution (min 10 bit would be nice) an average of multiple samples could be used.
  • A possible problem could be that the ADC inputs are single ended and not differential. This makes them sensitive to common mode errors (ground bounce due to large currents flowing through the ground plane). For a single motor this is no problem at all because we only see the AC component of the current signals. So any DC offset is automatically removed.

    However, if multiple motors are to be controlled by a single P2 we have more than one single star ground point and if the motors run at different speeds the AC signal components might interfere each other (inter-modulation). I hope we could find a solution how to eliminate or at least minimize that effect.
  • I've already got some experience with the ADCs of the P2 but I'm no expert when it comes to sigma-delta theory. The docs say that SINC3 filtering is best for fast changing signals. I doubt that the stated ENOB is actually usable, I mean, the sample values surely won't settle to 16 bits accuracy if I use 256 clocks sampling period. There's simply not enough information in 256 single bit samples. But it gives me ~0.7Msps at 180MHz sysclock. After a state change I have to wait for at least 3 samples or a bit more than 2µs for the results becoming valid, again. To supress switching noise a short dead time after any PWM state change would be good, anyway.

    The most critical condition is standstill or slow speed where the drives have to be as silent and accurate as possible. At higher speeds the motors are humming or whisteling anyway so a small error in amplitude won't be noticed.

    As already said, at slow speeds the duty cycle is always near 50% so the de-modulation can sum up many samples per PWM period to increase resolution. An accuracy (linearity and offset) of 0.1% or better would be disirable. This would mean 5mA max. error at 5A peak motor current. Gain error doen't matter much and can be as high as 10% as long as both channels match to 1 or 2%.
  • I'm sure you know how to do it by means of any of the generally available differential-to-single-ended conversion techniques, but Analog Devices seems to have a low cost alternative, which is very tempting due to its simplicity yet fast enough to be usefull at the sample rates required by your application.

    https://analog.com/media/en/analog-dialogue/raqs/raq-issue-145.pdf

    It's also reccomended in situations where ground potentials differ, which would help in case of multiple motors control.

    Hope it helps

    Henrique
  • ManAtWorkManAtWork Posts: 844
    edited 2020-11-17 - 18:02:01
    No doubt, the problem could be solved with a differential amplifier. But the suggested ADA4807 costs more than $2.50 which is more than my whole power stage alltogether. (and BTW you had to use 4 of them to measure current at all four shunt resistors)

    And even if money didn't matter the challange here is to use as few external parts as possible. It would be very cool if the P2 could drive a stepper motor with only two MOSFET pairs, two resistors and two gate driver ICs. Everybody else could do it with special motor driver ICs or complex discrete analogue ciurquitry. But I just don't want to.
  • This is a great challenge.

    I'm also interested in current sensing the P2 current via 50 milliohm resistors but was thinking of DC rather than AC coupling (since we also have a calibration points at rails (near VIO, or near GIO for low side sensing here). There may be a way of multiplexing the current sense resistor with a pullup resistor, so current can be read when the CS pin of flash is high

    The ADA4807s also come in a 4 pack, but yes probably overkill for this
  • quick circuit diagram...
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  • ManAtWork wrote: »
    I've already got some experience with the ADCs of the P2 but I'm no expert when it comes to sigma-delta theory. The docs say that SINC3 filtering is best for fast changing signals. I doubt that the stated ENOB is actually usable, I mean, the sample values surely won't settle to 16 bits accuracy if I use 256 clocks sampling period. There's simply not enough information in 256 single bit samples.

    That's the point of a filter like that. If you're reading some continuous signal, it's probably either going to stay roughly in the same ballpark or changing so much that the precision isn't really important. Relatedly, see DSD audio. DSD64 (as used in SACD) stores just 64 raw ADC bits in the same period taken up by one 16 bit sample in normal PCM CD audio, yet is of very slightly better quality (at a 4x size increase...).
  • evanhevanh Posts: 10,088
    edited 2020-11-18 - 06:29:04
    ManAtWork wrote: »
    After a state change I have to wait for at least 3 samples or a bit more than 2µs for the results becoming valid, again. To supress switching noise a short dead time after any PWM state change would be good, anyway.
    That is an ever present trait of Sinc3. It is called a filter after all.

    That trait just presents as a lag when not interrupted. For a 256 bit-clock per sample, the samples are effectively 768 bit-clocks lagging the analogue input. Or probably more accurately, each sample period is three sample intervals long.

    The accumulation in the Sinc3 registers is at 24 bits by then, so ENOB of 16-bit has some headroom.

  • Tubular wrote: »
    I'm also interested in current sensing the P2 current via 50 milliohm resistors but was thinking of DC rather than AC coupling (since we also have a calibration points at rails (near VIO, or near GIO for low side sensing here). There may be a way of multiplexing the current sense resistor with a pullup resistor, so current can be read when the CS pin of flash is high

    If I understand correctly you want the P2 to sense its own current draw. That should be possible. But don't expect the ADC auto calibration to be perfect. There is an Offset that remains after calibration and that's pin and temperature dependent. I'd use an external multiplexer (74HC4051 are cheap) and AC coupling to get rid of the DC offset.

    Using the ADC x 31.6 mode would give much better resolution and SNR. What accuracy and bandwidth do you need?
  • TonyB_TonyB_ Posts: 1,543
    edited 2020-11-18 - 12:15:53
    ManAtWork wrote: »
    I've already got some experience with the ADCs of the P2 but I'm no expert when it comes to sigma-delta theory. The docs say that SINC3 filtering is best for fast changing signals. I doubt that the stated ENOB is actually usable, I mean, the sample values surely won't settle to 16 bits accuracy if I use 256 clocks sampling period. There's simply not enough information in 256 single bit samples. But it gives me ~0.7Msps at 180MHz sysclock. After a state change I have to wait for at least 3 samples or a bit more than 2µs for the results becoming valid, again. To suppress switching noise a short dead time after any PWM state change would be good, anyway.

    Oversampling ratio (OSR) = 256 seems to be the norm for sinc3. The "post-diff ENOB" values in the doc for sinc2 & sinc3 should be treated as "output data width" and real-life ENOBs will be less.

    The latest doc I have says this about sinc2 vs sinc3:
    SINC3 filtering is like SINC2, but employs an additional level of accumulation to increase sensitivity to dynamics in the input signal. SINC3 doubles the ENOB (effective number of bits) over simple bit-summing for fast signals, but it is only slightly better at DC measurements than SINC2 filtering at the same sample period. Because SINC3 takes more resources within the smart pin, it is limited to 512 samples per period, making it less practical than SINC2 for precision DC measurements, but quite ideal for tracking fast, dynamic signals. After starting SINC3 filtering, the filter will become accurate starting on the third period.

    I find "quite ideal" a bit troubling and I'd prefer the following (changes in bold):
    SINC3 filtering is like SINC2, but employs an additional level of accumulation to increase sensitivity to dynamics in the input signal. SINC3 doubles the ENOB (effective number of bits) over simple bit-summing for fast signals, but it is only slightly better at DC measurements than SINC2 filtering at the same sample period. Because SINC3 takes more resources within the smart pin, it is limited to 512 samples per period, making it less practical than SINC2 for precision DC measurements, but better for tracking fast, dynamic signals. After starting SINC3 filtering, the filter will become accurate starting on the third period.

    I think "better" is more accurate and safer to put in an official document as sincX filters are not "ideal" regarding the passband, which is not flat. I don't know whether Chip will see this post.
  • jmgjmg Posts: 14,540
    Tubular wrote: »
    This is a great challenge.

    I'm also interested in current sensing the P2 current via 50 milliohm resistors but was thinking of DC rather than AC coupling (since we also have a calibration points at rails (near VIO, or near GIO for low side sensing here). There may be a way of multiplexing the current sense resistor with a pullup resistor, so current can be read when the CS pin of flash is high
    The CS high is then only 1.8v, which is a bit marginal for a logic Hi on 3v3 Vcc ?
    To get best zeroing you may need a modest series R that can be shorted, or a SPST analog switch like 1G3157 allows a single component design - ADC may not need to be AC coupled, as some modest gain can be asked for if you rely on 1v8 being 150mV away from 3v3/2


  • OK, I think I'll give it a try and build a PCB prototype. The ground offset or intermodulation problem with multiple motors can probably be avoided by using proper star grounding, or more precisely "tree grounding" with nested star topology: the power stages of all motors are connected to a global star point where also the ground of the P2 is connected to. Each power stage has a local star point where all four shunt resistors are connected. This way no ADC input sees the ground shifts caused by current draws of other motors. The local star point has some offset to the global star point but the offset is cancelled out by the AC coupling.

    Unfortunatelly, I need more than 8 pins for one motor:
    * 4 PWM outputs (one for each half bridge / motor terminal)
    * 4 ADC inputs
    * one input for overcurrent alarm (triggered by a high side shunt to be protected against shorts to ground)
    * one enable output (to disable all MOSFETs in the case of overcurrent)
    The P2 has plenty of pins so it still could control up to 6 motors. But an "accessory board" style PCB that can be plugged onto an 8-pin port of the EVAL board would be cool.

    With current sensors or external amplifiers we could get rid of two ADC inputs and trade pin count for external part count.
  • Three axis motor control on a single side of a KISS board. Do I sense right this is coming ? Very clever move.
  • I don't know if it's a good idea to soll this as accessory board. The ground layout is not "fool proof" and it simply won't work if not wired correctly. I have to isolate the ground planes to avoid ground loops but that means the drivers are fried if the external ground connections fail somehow. I'll probably add protection diodes.

    However, it's the best way to find out if it works. Then I can make a 4 axis board with all the ground connections on board.

    BTW, 3 won't fit on one side of the KISS board anyway but 2 on each side.
  • Agreed. Some challenges ahead.
    Making a POC board is totally different than making an accessory board for the general public use.

    The major threat I can see here is a user himself. It so happens these days (many) people expect an accessory board should be immune to whatever abuse the user might come up with. Nothing wrong with that in general but it often makes the design more complicated and costly to make a board "fool proof".
    Both of these could be avoided if the user base was somewhat more "technically literate" and with the attitude to understand how it works before plugging it in, which is not always the case. So yes, I agree. It might be challenging to produce it as an accessory board.
  • Preliminary schematic:P2-Stepper1.pngP2-Stepper1.png

    Another argument against an accessory board is the fact that multiple supply voltages are neccessary. For a single motor board step-up or down converters would make it more expensive. Without converters it's not user-freindly.
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  • MaciekMaciek Posts: 183
    edited 2020-11-23 - 19:11:33
    The schematic says pretty much everything. I do not quite agree it would not be user friendly without the converters. It would just not be friendly to every user.
    It pretty much depends on how exactly the user wants to address the powering scheme. I, for one, would go with a separate (to the board, provided by the user) power supply module with all voltages needed, starting from 5V and up. That would fit the bill for me.

    BTW, have you considered powerSTEP01 from ST ? It looks promising. Not cheap, true, but relatively easy to route and powerful.
  • jmgjmg Posts: 14,540
    ManAtWork wrote: »
    I've already got some experience with the ADCs of the P2 but I'm no expert when it comes to sigma-delta theory..
    AC coupling with higher gain is interesting, but the 100nF may be too large. Ground noise is also going to be an uissue
    The P2 feedback resistor is ~ 540k, so that's quite a long time to charge the 100nF into the measuring region.
    Experimenting on the value may be needed, and capture/zero needs to be carefully PWM synchronous..
  • Yeah this AC coupled ADC stuff needs further investigation and examples. The impedance is of course lower at the higher gains. If you wanted to you could pre-charge the cap by using the dac to output a mid level, before handing control back to ADC.

  • The x10 mode has +/-250mV input range and 45k equivalent input resistance. If I calculate correctly that results in an RC time constant of 4.5ms. I think that's fairly ideal and lets the lowest possible baseband signal of ~500Hz pass while blocking lower frequencies that are caused by motor load changes and current draw through the ground plane (DC to 100Hz).

    Of course, that's just a rough estimate and experiments have to be carried out to find the optimum component values.

    And yes, de-modulation has to be synchronous to the PWM with at least 3 samples dead-time after switching states.
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