Cluso's P2 SD Drivers
Increased performance and now works from 10MHz-370MHz
(my P2EVAL fails serial at 380MHz). Code attached.
I expect to release a number of versions, all with different advantages and disadvantages. They will be released on this thread, with the latest releases in this post.
They are all based on my SD Driver present in the P2 ROM for booting from an SD Card.
While I have released various test versions in the past, all new releases will be available from here.
Cluso's P2 SD Driver for COG v.222
This is the first (test) release of my COG version of my SD Drivers. There are two files in the zip file...
is just the driver. It requires your code to work for now, and it can be compiled with your code. There is very little space left in the cog ram though you can relocate it in LUT except for the 16 registers it requires which can be located anywhere in COG - just change the _regs equate.
I intend to release a mailbox version later so that this driver could reside in its' own COG and communicate via a 4 long hub mailbox.
This driver has been made for speed with reads and writes being unraveled and hence its' big footprint. Each send/receive bit takes 4 instructions for an 8 clocks per bit which averages to 9 clocks per 512+2 bytes. My tests have been done at 200MHz - I haven't checked other clock speeds yet.
Works from 40MHz-280MHz
(290MHz fails, didn't try below 40MHz))
Timing tests have been commented out. You can re-enable them or use SD_COG_test.spin2 to do any timing yourself.
If you look at the readFast sections you will see TESTB instructions commented out. This is an alternative method I tried and should shift the sample window one clock earlier (because TESTB has an extra clock delay between the sample it sees and the instruction starting versus TESTP). If you want to try it, comment out TESTP and uncomment TESTB for each pair.
I intend to add block mode later.
Note that this code will only work on SDHC cards and above which use block mode for sector addresses rather than the older original byte mode. Cards 4GB and above are likely to be OK.
is the above driver with a test harness built using the ROM Serial/Monitor calls. It has timing placed for each function call so you can tell how fast your SD Card is.
Note: There is a bug in my _readFastLong routine so I am performing 4 byte reads for this instead. It's only when reading the command response so it doesn't really matter. I wanted to get this out hence the workaround.
Please report any bugs or problems here. Enjoy
Notes: There is a significant lag in SD Cards while preparing to read or write a sector. I have observed lags on my SanDisk Ultra 16GB microSD SDHC I C10 of 4ms, 2.7ms and 1.7ms before the read or write can proceed (ie busy). I am achieving (at 200MHz) 512+2 byte reads of 37071 clocks = 185us or 2.77MB/s and 512+2 byte writes of 40145 clocks = 200us or 2.56MB/s