P2 VGA question

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  • That’s fine. Been off with the flu last 3 days :(
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  • evanhevanh Posts: 8,259
    edited 2019-07-05 - 13:00:10
    Certainly composite sync makes sense. If I'm reading docs correctly (LM1881 datasheet) then it can be done as timed logic inversions. Only two levels, which means CMOD can still be used. Trade in the DRVNOTs for a couple more XCONTs paired with SETCMODs I'd guess.

    I doubt digitally encoded sync on green has merit. I suspect it would take away a chunk of the colour depth.

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  • Evan, Sync on green was on the ps2 and other computers too. From what I can see, many monitors support it even tho their specs don’t show it. I need to build an external circuit to see if my Acer 24” monitors support it so I can try it out.

    SOG shouldn’t have any effect on the colours. Why would you think otherwise?
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  • You want it internally generated. That means some of the green DAC range has to be allocated to sync levels.

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  • Well I suppose a little definition could be lost. The signal diagrams show the green effectively shifted up to 0.3-1.3V and the sync at the 0V level. So the green could get shifted by the coloriser.
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  • The Hsync pin is setup as DAC with 123 ohm 3V3. This is TTL logic.
    RGB pins are setup as 75 ohm and 2.0V. I thought I saw this should be 1V p-p so I need to check it out.

    Now I can externally generate composite sync easily with an XOR gate such that when Vsync is active, Hsync gets inverted with this signal being the composite sync. I will need Vsync to be positive so I’ll need to invert it in software. Or I can do all this in software, initially on another pin..

    BTW just remembered that video recorders output to tvs using RGB cables so they must have been using sog.
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  • Cluso99Cluso99 Posts: 15,530
    edited 2019-07-05 - 14:41:09
    deleted
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  • You could also invert HSYNC by controlling CMOD[0].
  • jmgjmg Posts: 14,088
    Cluso99 wrote: »
    ...
    What I am unsure about is how many monitors support GOS (green on sync), and if any support composition sync on the Hsync pin.

    IIRC someone reported they pretty much all support composite sync, saying they XOR them inside the chipsets... Makes sense if you think about it.
    Easy enough to try, but can you not just invert the pin at the frame-rate, to save an external XOR ?
  • Yes, bit CMOD[0] is intended for sync polarity control. It can be inverted on the fly for embedding a vsync onto the hsync.
    We have the vastness of the internet and yet billions of people decided to spend most of their time within a horribly designed, fake-news emporium of a website that sucks every possible piece of personal information out of you so it can sell it to others. And they see nothing wrong with that.
  • Chip,
    What I am trying to do is save a pin by combining HSYNC and VSYNC. If monitors cannot support this I can include an optional external circuit to separate it back out.

    As Evan said, I think all that is required is to invert HSYNC just for the time when VSYNC would be active.

    The next objective is to save another pin by doing SOG (Sync On Green). Again, if necessary, I can provide an optional external separator circuit.

    My aim is to build a P2 demo board that can run 8 identical cores that have a VGA, Keyboard, 64KB of hub ram, and 8 I/O (including the VGA and Keyboard). Obviously there is a boot issue here, but once running those pins can be redeployed.

    The aim here is to “SHOWCASE” some things the P2 can do, like how each core is truly independent, can run at 160MHz and beyond, etc.
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  • cgraceycgracey Posts: 11,897
    edited 2019-07-05 - 22:59:57
    Cluso99 wrote: »
    Chip,
    What I am trying to do is save a pin by combining HSYNC and VSYNC. If monitors cannot support this I can include an optional external circuit to separate it back out.

    As Evan said, I think all that is required is to invert HSYNC just for the time when VSYNC would be active.

    The next objective is to save another pin by doing SOG (Sync On Green). Again, if necessary, I can provide an optional external separator circuit.

    My aim is to build a P2 demo board that can run 8 identical cores that have a VGA, Keyboard, 64KB of hub ram, and 8 I/O (including the VGA and Keyboard). Obviously there is a boot issue here, but once running those pins can be redeployed.

    The aim here is to “SHOWCASE” some things the P2 can do, like how each core is truly independent, can run at 160MHz and beyond, etc.

    Cluso99, the color space converter can drive 1080p (via Y-Pb-Pr signalling) over just three pins. Those are the most commonly available monitors, anymore. All three signals are used for HSYNC, and VSYNC is some special pattern, as I recall.
  • Cluso99Cluso99 Posts: 15,530
    edited 2019-07-05 - 23:20:49
    Chip,
    I am not sure how available Y-Pb-Pr monitors are in Oz.

    My monitors have a mix of VGA, DVI and HDMI (all have VGA but I know some newer monitors don't have VGA anymore). My new TV has a pair of HDMI and an AVin port (composite video and audio).

    But VGA (computer) monitors are plentiful on the kerbside here, so that is what I am aiming to drive B)

    I know I could do composite video (NTSC). Can P2 do PAL? I probably should add this as an option.

    Since each core will only have 8 pins, 3/4/5 go to VGA (and I may allow for even less by removing R and/or B ), 1 or 2 pins for the PS2 keyboard, and the rest are user I/O pins. There is a small breadboard area for each cores free I/O pins.
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  • Peter JakackiPeter Jakacki Posts: 8,772
    edited 2019-07-06 - 01:57:18
    I'm not sure if your demo would be practical. 8 video displays require 8 cogs, doesn't it? While you can run ps/2 keyboards as one smart pin asynch (I do), you will be limited to what you can display so it won't really "show off" the P2 in that respect. Now 4 displays could each run 256 color qvga and you would still have 4 cogs to do some real processing.

    I know i could do that now with TAQOZ with Mandelbrot in one, breakout game in another, movie in the third and just run a TAQOZ console in the other. Each display could use its keyboard or be controlled from another.

    EDIT: Actually you could have a mix of resolutions and colors. I'd do two as 8-bit QVGA, one as hires 128x64 color text on the console, one as your 1920x1080 mono (that takes a good half of the RAM).

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  • Also be aware that if you are using the streamers to generate video that inhibits you from running hubexec code on those cogs.
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  • One pin can do mono HDTV. Just supply the "Y" signal with sync. Useful up to 1080i officially, with many sets allowing 1080p

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  • Thanks for your input guys. I missed the hubexec tho it probably will not be a problem with my plans.
    The top core/port is more of an issue as it then has to share its I/O with the boot pins which currently is not confirmed.

    My pcb is shaping up little by little now. There is a nice prototyping area for each core, and the VGA/KBD PCB(s) plug into it. So if another option is required, then just unplug the VGA/KBD and its available for another or just use the prototyping area.

    I haven't firmed up on the regulators yet. Currently I am thinking maybe the AP3445LW6-7 switcher with TYS50402R2N-10 for both 3V3 and 1V8 (in the next P2-Eval) tho I am open to suggestions. Pretty sure I am just going to use a 3225 Xtal - either 12MHz or 20MHz - and not an oscillator.
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  • jmgjmg Posts: 14,088
    Cluso99 wrote: »
    ...
    My pcb is shaping up little by little now. There is a nice prototyping area for each core, and the VGA/KBD PCB(s) plug into it. So if another option is required, then just unplug the VGA/KBD and its available for another or just use the prototyping area.

    I haven't firmed up on the regulators yet. Currently I am thinking maybe the AP3445LW6-7 switcher with TYS50402R2N-10 for both 3V3 and 1V8 (in the next P2-Eval) tho I am open to suggestions.

    Switchers on 1v8 make sense.
    Switcher on 3v3 is a less clear choice.
    Given the noise-sensitive uses of 3v3, Linear regulators may be a better choice ?
    If current may be an issue, spinkle more of them... ( the P2Eval has an over-kill count on 3v3 regulators)

    I've chosen 2 of NCP187AMT330TAG on P2D2Pi - that's 1.2A peak, and low noise / high psrr, PGood included, and in a package that can be cooled better than the 1mm LDOs
    Shows due in about a week
    https://www.digikey.com/product-detail/en/NCP187AMT330TAG/NCP187AMT330TAG-ND
    Cluso99 wrote: »
    ...
    Pretty sure I am just going to use a 3225 Xtal - either 12MHz or 20MHz - and not an oscillator.
    Xtals are cheap and simple, but severely limit your clock precision choices.
    It's not hard to allow a dual footprint choice for the 4 pin Osc/Xtals ? GPS oscillators are surprisingly cheap, (well under $1) and a VCTCXO model allows very fine clock calibration.
    I've verified P2 is OK (typically) with clipped sine drive, up to 38.4MHz

    If you can allow for up to a 5x3.2 footprint, you can reach to this level of 0.2ppm (VC-CS) spec from Murata choices from 10MHz to 40MHz for sub $10
  • jmg wrote: »
    Cluso99 wrote: »
    ...
    My pcb is shaping up little by little now. There is a nice prototyping area for each core, and the VGA/KBD PCB(s) plug into it. So if another option is required, then just unplug the VGA/KBD and its available for another or just use the prototyping area.

    I haven't firmed up on the regulators yet. Currently I am thinking maybe the AP3445LW6-7 switcher with TYS50402R2N-10 for both 3V3 and 1V8 (in the next P2-Eval) tho I am open to suggestions.

    Switchers on 1v8 make sense.
    Switcher on 3v3 is a less clear choice.
    Given the noise-sensitive uses of 3v3, Linear regulators may be a better choice ?
    If current may be an issue, spinkle more of them... ( the P2Eval has an over-kill count on 3v3 regulators)

    I've chosen 2 of NCP187AMT330TAG on P2D2Pi - that's 1.2A peak, and low noise / high psrr, PGood included, and in a package that can be cooled better than the 1mm LDOs
    Shows due in about a week
    https://www.digikey.com/product-detail/en/NCP187AMT330TAG/NCP187AMT330TAG-ND
    Cluso99 wrote: »
    ...
    Pretty sure I am just going to use a 3225 Xtal - either 12MHz or 20MHz - and not an oscillator.
    Xtals are cheap and simple, but severely limit your clock precision choices.
    It's not hard to allow a dual footprint choice for the 4 pin Osc/Xtals ? GPS oscillators are surprisingly cheap, (well under $1) and a VCTCXO model allows very fine clock calibration.
    I've verified P2 is OK (typically) with clipped sine drive, up to 38.4MHz

    If you can allow for up to a 5x3.2 footprint, you can reach to this level of 0.2ppm (VC-CS) spec from Murata choices from 10MHz to 40MHz for sub $10

    But I am only going to ship one xtal value so no point in having options
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    P1 Prop OS (also see Sphinx, PropDos, PropCmd, Spinix)
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    P1: Tools (Index) , Emulators (Index) , ZiCog (Z80)
    P2: Tools & Code , Tricks & Traps
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