Propeller reset

What transition resets a Propeller chip? Is it the transition from low to high on the /Reset pin? I'm asking because I'm wondering what would happen if a Propeller is powered up with its /Reset pin held low and then later it is brought high. Would the Propeller come out of reset and start its boot process? Or does that require both the transition from high to low and then low back to high?

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  • The Prop's reset is not edge-sensitive; it's level-sensitive: i.e. any low that meets the hold time requirement.

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
  • Okay, so no matter what the initial state of /Reset, if I hold it low for say 10ms and then bring it back high then the Propeller should reset. Is that correct?
  • Yes. It will then start 50mS after RESn is brought high.
    In science there is no authority. There is only experiment.
    Life is unpredictable. Eat dessert first.
  • Thanks!
  • David Betz wrote: »
    What transition resets a Propeller chip? Is it the transition from low to high on the /Reset pin? I'm asking because I'm wondering what would happen if a Propeller is powered up with its /Reset pin held low and then later it is brought high. Would the Propeller come out of reset and start its boot process? Or does that require both the transition from high to low and then low back to high?

    Most static CMOS parts have Level Sensitive Reset, which means you can hold RST low during Power Up.
    Many MCUs also have a reset width spec, in SysCLKs, - ie they need a CLK active, in order for that Reset to occur.
    In those, holding reset low, then raising before the clock starts, gives no reset.

    There is also a reset active Icc, that matters in power-wakeup designs, but often is not specified. ie the Icc drawn during a long-term reset.
    (In P1 there is also the power drawn, during the long reset-exit)

    P1 has an on-chip RC osc as the default driver, so it should meet any SysCLK during reset needs that may be present.


  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 20,928
    edited February 12 Vote Up0Vote Down
    kwinn wrote:
    Yes. It will then start 50mS after RESn is brought high.
    To clarify, the boot loader starts loading into RAM from ROM 50ms after /RST goes high. That process takes 640us. Loading code from EEPROM into RAM to start executing takes another 1.3-1.6s.

    The Propeller datasheet does not specify a minimum hold time for /RST, nor does it specify a maximum glitch length on Vdd before a brownout reset occurs. The latter is probably also a function of the glitch's "depth" and the effects of the chip's internal capacitance.

    -Phil
    “Perfection is achieved not when there is nothing more to add, but when there is nothing left to take away. -Antoine de Saint-Exupery
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