qZ80 - the third shot
pullmoll
Posts: 817
Here's my next shot at emulating the Z80. This is the third (almost) complete rewrite and is avoiding as much as possible the things that made try #2 slower than necessary. Therefore I dare to give it the name qz80 for quick Z80 
It uses the ZiCog technique of jump vectors: a vector is a long representing an opcode and contains up to 3 cog addresses to be executed one after another. Most single byte Z80 opcodes are executed this way. For the remaining opcodes, the ones that are more complicated - not orthogonal to the instruction set - it uses the well known LMM technique, which is enganged simply by vector[noparse][[/noparse]8..0] pointing to the label lmm and vector[noparse][[/noparse]31..9] containing the LMM program counter.
I squeezed out some LMM code by calculating e.g. the bit number for BIT/RES/SET from the opcode rather than replicating almost the same PASM code 7 times. I couldn't do it for the shift/rotate opcodes, because their core code has to be called from other LMM PASM code as well.
The speed impact was more noticeable before I started to switch to a Spin code I/O handler for CP/M (and the DracBlade). I did switch to Spin because the I/O cog ran full and I did not yet have all ports handled. The also working PASM I/O handler is in the archive under io.orig, and you can replace io.spin with io.orig to see the difference. In the long term I think I should go with the PASM code after a redesign and decision of what is necessary and what isn't. The best solution would - again - be LMM code for the rarely used port accesses and in-core code for things like conout/conin and the hard disk accesses.
I only tested this on the DracBlade, as I currently can't write SD cards (out of accus [noparse];)[/noparse] to try under Sphinx on a RamBlade. Perhaps some RamBlade owner can give it a try? The only thing you have to change is to enable the #define RamBladeProp instead of the DracBladeProp in cpm.spin. Use a terminal at 115k2 baud to connect.
I'm starting with version number 0.9.0 this time, because the core is pretty complete and contains few bugs, if any.
In the ZIP is a subdirectory lib which contains shared objects from me and third parties - and even some currently unused ones.
Note: I used a different method from ZiCog for the communication between Z80 and I/O handling cog. All I/O is using just one long, defined in io.spin. The topmost bits 31..24 contain the I/O command, which is non-zero while the I/O cog is busy. The bits 23..8 contain the port number (the Z80 optionally can have 16 bit ports, just as the real thing). The bits 7..0 contain the data, in both directions. The Z80 cog writes the long with command, port and optionally data (for io_cmd_out) and waits for the bits 31..24 to become 0. For an io_cmd_in the long then contains the read data in bits 7..0.
Juergen
v0.9.1:
Changed to use DracBlade_mb_small_spi.spin for a combined SD SPI and XMM interface. The TriBlade and RamBlade targets currently don't work because of lack of such an object. Add brand new VT100 terminal emulator in PASM LMM. Set scroll range has issues, but Wordstar seems to work for the most part I tested. VGA doesn't work for me. It makes the SPI driver return an error for the very first read sector!?
v0.9.2:
Found the bug that caused the invalid error result from the SD SPI driver. I only don't know why it didn't happen with the TV driver, too. The VT100 emulation problems seem to be fixed. Some escape sequences are missing, but they don't seem to be all that important for Wordstar.
v0.9.3:
Fixed the unwanted software cursor shining through in VGA mode. Changed qz80 so that it fits under trs80 again (1 long free).
v0.9.4:
Add support for banked memory using the SIMH port $fe. Command 18 ($12) returns $01 on the next read from port $fe, meaning "system supports banking". Command 12 ($0c) followed by a bank number 0...9 selects a new 48K bank for $0000..$bfff. Physical memory is assigned by the formula baseaddr = bank ? (bank - 1) * 48KB + 64KB : 0. so bank #9 is at 448KB to 496KB-1. Bank 10 would be incomplete (496KB to 512KB - 1 = 16KB) and you should not use it.
Also fix vt100 emulation which sometimes would clear the wrong range, or none, for <ESC>[noparse][[/noparse]...J and <ESC>[noparse][[/noparse]...K sequences.
v0.9.5:
Add (and fix) support for a timer interrupt running at clkfreq/64 (15.625ms). The io.spin code generates this interrupt by writing $ff to the irq variable. The Z80 then executes a RST 38 in either interrupt mode 0 or mode 1.
v0.9.6:
Add support for direct access to the LCD of the DracBlade. Port $14 (20) acts as status port. It always returns $02 (output possible, no input). Port $14 is also the port to send LCD instructions like clear screen, cursor modes etc. Port $15 (21) is the LCD text output port. Characters sent there appear at the current cursor position.
v0.9.7:
Harddisk I/O below $c000 goes to the selected bank now.
v0.9.8:
Implemented SIMH commands: start timer (21), set timer delta (23), set timer interrupt address (24). Banked memory limit changed to $b000.
v0.9.9:
Add dummy console ports 1, 2 and 3 for MP/M. MP/M starts up, but doesn't know any command!?
v0.9.10:
In preparation for running MP/M. Console is just SIO #0 now (ports $10, $11). Keyboard / TV or Keyboard / VGA is console #1 ($14, $15). SIO #1 is console #2 ($16, $17). LCD text is punch data ($13), LCD instructions is punch status ($12).
v0.9.11:
Fixed a bug in the do_interrupt code that would dispatch to interrupt mode 1 on a wrong zero flag status. Now interrupt modes 0, 1, 2 work as expected. The also attached A.DSK contains an MP/M that works under SIMH and _should_ work on qz80 on the DracBlade, but it hangs after displaying the MP/M startup message.
Edit: Modified MPMXIOS.MAC to use an intermediate DMA buffer - to no avail.
v0.9.12:
Fixed a bug in qz80 interrupt handler: When the Z80 is in a HALT instruction, the PC has to be incremented once and the HALT flag has to be reset prior to the interrupt code pushing the PC to the stack. No change in MP/M not wanting to run without flaw.
v0.9.13:
Allow disabling the HAVE_LCD define again.
v0.9.14:
Fix interrupt code which was reading the irq to t1 instead of tmp, causing funny things to happen depending on whatever was left in tmp from some earlier instructions. MP/M is slow!
v0.9.15:
Fix a bug in the keyboard LMM code: it didn't return for normal keys but fell through to the next code fragment. Reset MP/M parameters to the (SIMH) defaults: 8 hard disks and 50 ticks per second interrupt rate. Set the system flag on the *.PRL files, so all MP/M users can access them.
v0.9.16:
Add wrapper ports 32, 33, 34 ($20, $21, $22) which, when written to, stuff a byte into the input buffer of console 0, 1, 2 respective.
v0.9.17:
Major change to the environment: The A: disk is now 32MB using 16KB blocks. The code supports up to 3 hard disks and you can have them in sizes of 1, 2, 4, 8, 16 or 32MB (only 8 and 32 are tested). The io.spin adapts the DPBs depending on the hard disk image size. CPMBOOT is rebuilt for 3 disks and shrinks in size to $800 bytes. The MPM.COM is also adapted to the new settings. Dr_Acula's wrapper ports are implemented on ports 32..34 ($20..$22). The ports are write-only and stall execution if the respective input buffer is full. Be careful to avoid dead locks in single threaded mode, i.e. CP/M with a kernel that does not asynchronously poll the console inputs.
v0.9.18:
Remove port $18/$19 handling (console #3) and instead add support for N8VEM ports $68 (data) and $6d (modem status). $6d returns bit #5 for "tx empty" and bit #0 for "rx available".
v0.9.19:
Fix a typo in n8vem_st status read.
v0.9.20:
Modified pcFullDuplexSerial4FC.spin to a new pcFullDuplexSerial2FC.spin that supports just 2 SIO ports, but has 256 bytes RX buffer for each. Changed io.spin to use that object and the new buffer size. Change MPMXIOS.MAC to retry 3 times on read/write sector errors which might happen due to MP/M interrupt code accessing ports during the transfer of the 6 hard disk parameter bytes.
v0.9.21:
Modify tv80.spin to support inverse characters for $80..$ff - This way you can recognize selected text in Wordstar
v0.9.22:
Changed LIST output to go to an external memory wrap around buffer of 16K. This is using ports 18 ($12) for status and 19 ($13) for data in and out. Writing a 3 to port 18 (reset) resets the head and tail pointers of the list buffer. One console can write its output to the buffer using ^P to enable redirection to the printer, or it can send directly using e.g. BASIC's LPRINT or LLIST commands. Another console / user can poll the port 18 status for bit 0 and, if non-zero, read a data byte from port 19.
The LCD is now accessible through ports 48 ($30) for instructions and 49 ($31) for text data.
v0.9.23:
BUGFIX: The DPBs for drives B: and C: were patched at wrong offsets, leading to impossible values for the DPB of drive B: and wrong values for drive C:
v0.9.24:
Optionally swap the assignment of user 0 and user 1. If you #define USER0_PS2_VGA, then user 0 uses the PS/2 keyboard and the VGA (or TV) and user 1 is on SIO port #0. This is mostly useful for CP/M mode. The initialization messages still go to SIO port #0, though, because the screen buffers re-use the io.spin cog init data range. (Re-upped, as the non-swapped mode was broken)
v0.9.25:
Extended the extended memory access through ports 18/19 ($12/$13). Writing a 3 to port $12 still resets the head and tail pointers to 0. Writing a 4 to port $12 now sets the head pointer to $3fff, so you will see a status of 3 reported for 16KB-1 reads. Writing a value between 16+1 to 16+7 to port $12 selects one of the 7 available 16KB banks. Before switching to another bank, the current bank's head + tail pointers are saved in hub RAM and the head + tail for the new bank are loaded. That way you can have 7 independent communication areas or up to 112KB data in total.
v0.9.26:
Minor change to qz80.start - parameter to optionally set the initial PC value.
v0.9.27:
Squeezed out even more longs from the qZ80 cog by grouping functions that could share some code. This was needed to fit the more complicated Colour Genie memory handlers into the #ifdef CGENIE sections. Fixed a bug in vt100.spin which was writing the screen row colours array beyond its size.
v0.9.28:
Changed the LCD delay for toggling the panel's enable line from 100_000 to 300_000 for Dr_Acula's board to work at 38400 baud (what a strange relationship).
Saved 3*6*8 words = 72 longs in the opcodes_cb table by slightly more complicated addressing of the bit/set/res opcodes (the net saving is lower because of the longer code).
v0.9.29:
Unified the TriBlade, RamBlade and DracBlade SPI SD + XMM code into one spi_warp.spin. I can't test the TriBlade and my RamBlade also seems to have issues. Could some of you test the code and post a success or failure report?
v0.9.30:
Updated with the latest Spectrum support. OUT (nn),A and IN A,(nn) now put A on the high address bus bits. Modified tables for the Colour Genie emulation. Minor fixes in ini(r),outi(r) opcodes.
v0.9.31:
Changes for Spectrum and Colour Genie emulation.
v0.9.32:
Add ports $28 (40) and $29 (41) to set the baud rate of SIO port #0 and #1. The value written is multiplied by 1200.
Update mpm_a_dsk
Changed the archive to contain Dr_Acula's modified MPMXIOS.MAC and MPM.COM which boot with fewer problems.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 7/28/2010 11:31:54 PM GMT
It uses the ZiCog technique of jump vectors: a vector is a long representing an opcode and contains up to 3 cog addresses to be executed one after another. Most single byte Z80 opcodes are executed this way. For the remaining opcodes, the ones that are more complicated - not orthogonal to the instruction set - it uses the well known LMM technique, which is enganged simply by vector[noparse][[/noparse]8..0] pointing to the label lmm and vector[noparse][[/noparse]31..9] containing the LMM program counter.
I squeezed out some LMM code by calculating e.g. the bit number for BIT/RES/SET from the opcode rather than replicating almost the same PASM code 7 times. I couldn't do it for the shift/rotate opcodes, because their core code has to be called from other LMM PASM code as well.
The speed impact was more noticeable before I started to switch to a Spin code I/O handler for CP/M (and the DracBlade). I did switch to Spin because the I/O cog ran full and I did not yet have all ports handled. The also working PASM I/O handler is in the archive under io.orig, and you can replace io.spin with io.orig to see the difference. In the long term I think I should go with the PASM code after a redesign and decision of what is necessary and what isn't. The best solution would - again - be LMM code for the rarely used port accesses and in-core code for things like conout/conin and the hard disk accesses.
I only tested this on the DracBlade, as I currently can't write SD cards (out of accus [noparse];)[/noparse] to try under Sphinx on a RamBlade. Perhaps some RamBlade owner can give it a try? The only thing you have to change is to enable the #define RamBladeProp instead of the DracBladeProp in cpm.spin. Use a terminal at 115k2 baud to connect.
I'm starting with version number 0.9.0 this time, because the core is pretty complete and contains few bugs, if any.
In the ZIP is a subdirectory lib which contains shared objects from me and third parties - and even some currently unused ones.
Note: I used a different method from ZiCog for the communication between Z80 and I/O handling cog. All I/O is using just one long, defined in io.spin. The topmost bits 31..24 contain the I/O command, which is non-zero while the I/O cog is busy. The bits 23..8 contain the port number (the Z80 optionally can have 16 bit ports, just as the real thing). The bits 7..0 contain the data, in both directions. The Z80 cog writes the long with command, port and optionally data (for io_cmd_out) and waits for the bits 31..24 to become 0. For an io_cmd_in the long then contains the read data in bits 7..0.
Juergen
v0.9.1:
Changed to use DracBlade_mb_small_spi.spin for a combined SD SPI and XMM interface. The TriBlade and RamBlade targets currently don't work because of lack of such an object. Add brand new VT100 terminal emulator in PASM LMM. Set scroll range has issues, but Wordstar seems to work for the most part I tested. VGA doesn't work for me. It makes the SPI driver return an error for the very first read sector!?
v0.9.2:
Found the bug that caused the invalid error result from the SD SPI driver. I only don't know why it didn't happen with the TV driver, too. The VT100 emulation problems seem to be fixed. Some escape sequences are missing, but they don't seem to be all that important for Wordstar.
v0.9.3:
Fixed the unwanted software cursor shining through in VGA mode. Changed qz80 so that it fits under trs80 again (1 long free).
v0.9.4:
Add support for banked memory using the SIMH port $fe. Command 18 ($12) returns $01 on the next read from port $fe, meaning "system supports banking". Command 12 ($0c) followed by a bank number 0...9 selects a new 48K bank for $0000..$bfff. Physical memory is assigned by the formula baseaddr = bank ? (bank - 1) * 48KB + 64KB : 0. so bank #9 is at 448KB to 496KB-1. Bank 10 would be incomplete (496KB to 512KB - 1 = 16KB) and you should not use it.
Also fix vt100 emulation which sometimes would clear the wrong range, or none, for <ESC>[noparse][[/noparse]...J and <ESC>[noparse][[/noparse]...K sequences.
v0.9.5:
Add (and fix) support for a timer interrupt running at clkfreq/64 (15.625ms). The io.spin code generates this interrupt by writing $ff to the irq variable. The Z80 then executes a RST 38 in either interrupt mode 0 or mode 1.
v0.9.6:
Add support for direct access to the LCD of the DracBlade. Port $14 (20) acts as status port. It always returns $02 (output possible, no input). Port $14 is also the port to send LCD instructions like clear screen, cursor modes etc. Port $15 (21) is the LCD text output port. Characters sent there appear at the current cursor position.
v0.9.7:
Harddisk I/O below $c000 goes to the selected bank now.
v0.9.8:
Implemented SIMH commands: start timer (21), set timer delta (23), set timer interrupt address (24). Banked memory limit changed to $b000.
v0.9.9:
Add dummy console ports 1, 2 and 3 for MP/M. MP/M starts up, but doesn't know any command!?
v0.9.10:
In preparation for running MP/M. Console is just SIO #0 now (ports $10, $11). Keyboard / TV or Keyboard / VGA is console #1 ($14, $15). SIO #1 is console #2 ($16, $17). LCD text is punch data ($13), LCD instructions is punch status ($12).
v0.9.11:
Fixed a bug in the do_interrupt code that would dispatch to interrupt mode 1 on a wrong zero flag status. Now interrupt modes 0, 1, 2 work as expected. The also attached A.DSK contains an MP/M that works under SIMH and _should_ work on qz80 on the DracBlade, but it hangs after displaying the MP/M startup message.
Edit: Modified MPMXIOS.MAC to use an intermediate DMA buffer - to no avail.
v0.9.12:
Fixed a bug in qz80 interrupt handler: When the Z80 is in a HALT instruction, the PC has to be incremented once and the HALT flag has to be reset prior to the interrupt code pushing the PC to the stack. No change in MP/M not wanting to run without flaw.
v0.9.13:
Allow disabling the HAVE_LCD define again.
v0.9.14:
Fix interrupt code which was reading the irq to t1 instead of tmp, causing funny things to happen depending on whatever was left in tmp from some earlier instructions. MP/M is slow!
v0.9.15:
Fix a bug in the keyboard LMM code: it didn't return for normal keys but fell through to the next code fragment. Reset MP/M parameters to the (SIMH) defaults: 8 hard disks and 50 ticks per second interrupt rate. Set the system flag on the *.PRL files, so all MP/M users can access them.
v0.9.16:
Add wrapper ports 32, 33, 34 ($20, $21, $22) which, when written to, stuff a byte into the input buffer of console 0, 1, 2 respective.
v0.9.17:
Major change to the environment: The A: disk is now 32MB using 16KB blocks. The code supports up to 3 hard disks and you can have them in sizes of 1, 2, 4, 8, 16 or 32MB (only 8 and 32 are tested). The io.spin adapts the DPBs depending on the hard disk image size. CPMBOOT is rebuilt for 3 disks and shrinks in size to $800 bytes. The MPM.COM is also adapted to the new settings. Dr_Acula's wrapper ports are implemented on ports 32..34 ($20..$22). The ports are write-only and stall execution if the respective input buffer is full. Be careful to avoid dead locks in single threaded mode, i.e. CP/M with a kernel that does not asynchronously poll the console inputs.
v0.9.18:
Remove port $18/$19 handling (console #3) and instead add support for N8VEM ports $68 (data) and $6d (modem status). $6d returns bit #5 for "tx empty" and bit #0 for "rx available".
v0.9.19:
Fix a typo in n8vem_st status read.
v0.9.20:
Modified pcFullDuplexSerial4FC.spin to a new pcFullDuplexSerial2FC.spin that supports just 2 SIO ports, but has 256 bytes RX buffer for each. Changed io.spin to use that object and the new buffer size. Change MPMXIOS.MAC to retry 3 times on read/write sector errors which might happen due to MP/M interrupt code accessing ports during the transfer of the 6 hard disk parameter bytes.
v0.9.21:
Modify tv80.spin to support inverse characters for $80..$ff - This way you can recognize selected text in Wordstar
v0.9.22:
Changed LIST output to go to an external memory wrap around buffer of 16K. This is using ports 18 ($12) for status and 19 ($13) for data in and out. Writing a 3 to port 18 (reset) resets the head and tail pointers of the list buffer. One console can write its output to the buffer using ^P to enable redirection to the printer, or it can send directly using e.g. BASIC's LPRINT or LLIST commands. Another console / user can poll the port 18 status for bit 0 and, if non-zero, read a data byte from port 19.
The LCD is now accessible through ports 48 ($30) for instructions and 49 ($31) for text data.
v0.9.23:
BUGFIX: The DPBs for drives B: and C: were patched at wrong offsets, leading to impossible values for the DPB of drive B: and wrong values for drive C:
v0.9.24:
Optionally swap the assignment of user 0 and user 1. If you #define USER0_PS2_VGA, then user 0 uses the PS/2 keyboard and the VGA (or TV) and user 1 is on SIO port #0. This is mostly useful for CP/M mode. The initialization messages still go to SIO port #0, though, because the screen buffers re-use the io.spin cog init data range. (Re-upped, as the non-swapped mode was broken)
v0.9.25:
Extended the extended memory access through ports 18/19 ($12/$13). Writing a 3 to port $12 still resets the head and tail pointers to 0. Writing a 4 to port $12 now sets the head pointer to $3fff, so you will see a status of 3 reported for 16KB-1 reads. Writing a value between 16+1 to 16+7 to port $12 selects one of the 7 available 16KB banks. Before switching to another bank, the current bank's head + tail pointers are saved in hub RAM and the head + tail for the new bank are loaded. That way you can have 7 independent communication areas or up to 112KB data in total.
v0.9.26:
Minor change to qz80.start - parameter to optionally set the initial PC value.
v0.9.27:
Squeezed out even more longs from the qZ80 cog by grouping functions that could share some code. This was needed to fit the more complicated Colour Genie memory handlers into the #ifdef CGENIE sections. Fixed a bug in vt100.spin which was writing the screen row colours array beyond its size.
v0.9.28:
Changed the LCD delay for toggling the panel's enable line from 100_000 to 300_000 for Dr_Acula's board to work at 38400 baud (what a strange relationship).
Saved 3*6*8 words = 72 longs in the opcodes_cb table by slightly more complicated addressing of the bit/set/res opcodes (the net saving is lower because of the longer code).
v0.9.29:
Unified the TriBlade, RamBlade and DracBlade SPI SD + XMM code into one spi_warp.spin. I can't test the TriBlade and my RamBlade also seems to have issues. Could some of you test the code and post a success or failure report?
v0.9.30:
Updated with the latest Spectrum support. OUT (nn),A and IN A,(nn) now put A on the high address bus bits. Modified tables for the Colour Genie emulation. Minor fixes in ini(r),outi(r) opcodes.
v0.9.31:
Changes for Spectrum and Colour Genie emulation.
v0.9.32:
Add ports $28 (40) and $29 (41) to set the baud rate of SIO port #0 and #1. The value written is multiplied by 1200.
Update mpm_a_dsk
Changed the archive to contain Dr_Acula's modified MPMXIOS.MAC and MPM.COM which boot with fewer problems.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 7/28/2010 11:31:54 PM GMT
Comments
Q) What is this?
A) This is code emulating an 8 bit CPU on a 32 bit µC, plus an environment to make it run an ancient operating system: CP/M.
Q) What do I need to run it?
A) You need a Propeller board with additional, external RAM. At least 64KB are required. Currently supported are the TriBlade, RamBlade and DracBlade, where the first two are untested by me.
Q) Why does VGA not work?
A) It does work now since version 0.9.2. The VT100 emulation code is brand new and largely untested, so if you see bugs, please report and/or fix them.
Q) Why does the TV out look so ugly?
A) Displaying 80x25 characters on a TV is pushing the resolution to its limits, especially with NTSC. Using less than 80x25 characters with CP/M on the other hand is pretty much useless, if you want to run Wordstar or other programs. The TV display and the VGA display now use the same VT100 emulation.
Q) Can I use a PS/2 keyboard?
A) Yes. Just enable the #define KBD in the top level cpm.spin (last tested with the io.orig code).
Q) How do I add my board design?
A) Just let me know how the external RAM is accessed in your case and I will add the required sections to the code.
Q) Can I use more than 64KB RAM? I have ...MB on my board.
A) Yes, you can. The SIMH compatible port $fe is used for banking. You can output a byte 18 (12h) to that port and read back the number of banks available. The command 12 (0ch) followed by a bank number 0 to (banks-1) selects another memory bank for the common area. The size of the common area can be determined by sending command 13 (0dh) and reading two bytes LSB, MSB. It is currently set to 00h,0c0h = 0c000h. MP/M works with these figures.
Q) Can I use interrupts with the Z80?
A) Yes, you can. Just #define INTERRUPTS in cpm.spin (or your top project) and set params for the call qz80.start(@params) to the address of the long that is used as interrupt requester. Then at any time set this long to -1 ($ffffffff) to request an NMI or to 255 ($ff) to request an RST 38h interrupt. In interrupt mode 0 you can also write a "CALL nnnn" into irq, i.e. $nnnnCD. If your Z80 code uses interrupt mode 2, you have to specify the LSB of the interrupt vector, e.g. $100 for vector I << 8 + $00.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 4/23/2010 2:54:08 AM GMT
Have You in it posibility to generate only 8080/8085 simulation ?
Regards
Christoffer J
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Nothing is impossible, there are only different degrees of difficulty.
For every stupid question there is at least one intelligent answer.
Don't guess - ask instead.
If you don't ask you won't know.
If your gonna construct something, make it·as simple as·possible yet as versatile as posible.
Sapieha
Hello Christoffer,
no, this code is just the Z80. For the 8080/8085 use the code from the M100 project. I may rewrite that one to use the vector technique, too, which should give it some more speed as well.
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Pullmoll's Propeller Projects
THANKS
Regards
Christoffer J
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Nothing is impossible, there are only different degrees of difficulty.
For every stupid question there is at least one intelligent answer.
Don't guess - ask instead.
If you don't ask you won't know.
If your gonna construct something, make it·as simple as·possible yet as versatile as posible.
Sapieha
My goal is to simulate GAMEBOY CPU ... That needs only 8080/8085 instructions and only some extra specific ones
Regards
Christoffer J
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Nothing is impossible, there are only different degrees of difficulty.
For every stupid question there is at least one intelligent answer.
Don't guess - ask instead.
If you don't ask you won't know.
If your gonna construct something, make it·as simple as·possible yet as versatile as posible.
Sapieha
Christoffer,
my code is under the MIT license, so you can grab it and give it a try
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Pullmoll's Propeller Projects
Thanks. BUT to that I need cut all Z80 specific code
Regards
Christoffer J
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Nothing is impossible, there are only different degrees of difficulty.
For every stupid question there is at least one intelligent answer.
Don't guess - ask instead.
If you don't ask you won't know.
If your gonna construct something, make it·as simple as·possible yet as versatile as posible.
Sapieha
Christoffer,
I was talking about ya85.spin, not qz80.spin. This thread is Z80 only, so we should move further discussion to the M100 thread.
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Pullmoll's Propeller Projects
You said " Let me know about the way you connect the memory "
Have you any experience of bit banging SDRAM ?
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Style and grace : Nil point
No, I haven't. Do you want to use SDRAM as external memory? Do they still need refresh cycles by the CPU or a refresh controller?
I'm reading the Wikipedia article about SDRAM now.
Edit: It looks to me as if the overhead of addressing SDRAM is just too much for the current core to handle. It may be possible to do the memory accesses in a separate cog and use a mailbox to read/write bytes, but that will be slow compared to DMA.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 4/10/2010 9:37:12 PM GMT
I should have an EDO (from an old VGA card) setup tommorow, simular to Jepsers AVR ccts. The data sheets do not state that the ADDR lines and the DATA are multiplex OK. I wonder if the syncronous nature will fight that.
http://www.myplace.nu/avr/dram/index.htm
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Style and grace : Nil point
I have an old now useless AGP nVidia VGA card. There are 8 Hynix HY57V641620HG / T-6 chips on it, which seems to be SDRAM as well (Datasheet PDF) I would need to find a way to solder those tiny pins to some wires... my, that doesn't look like I could do it without burning those things to hell. I would have 8 tries to do it right, though.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 4/10/2010 10:26:49 PM GMT
That ones need much more pins as them not have multiplexed DATA/ADDRESS pins
Regards
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Nothing is impossible, there are only different degrees of difficulty.
For every stupid question there is at least one intelligent answer.
Don't guess - ask instead.
If you don't ask you won't know.
If your gonna construct something, make it·as simple as·possible yet as versatile as posible.
Sapieha
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Style and grace : Nil point
I see it in the data sheet, yes. At least A0-A11 would be required besides DQ0 to DQ7 if you just ignored the upper 8 bits of the data words or used the multiplex mode of the chip: LDQM/UDQM. So RAS requires 12 bits, CAS the lower 8 bits on the address lines. The bank selection could be hardwired for a try. Finally you need CLK and CS, RAS, CAS, WE. That makes 12 + 8 + 5 pins minimum, leaving a few to do other useful things.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 4/10/2010 10:56:30 PM GMT
Can you cite any programming language versions running on these that you have successfully tried?
As curator of the "ultimate propeller language list," we are interested in all new languages for the propeller.
humanoido
humanoido
Soon I'd like to implement this on the dracblade and make it the standard code. But there are quite a few things that need adding.
1) The VGA and VT100 driver code.
2) The sd card driver code hairymnstr has written and which is currently being used in the latest dracblade code (fat16 or fat32 and works with more sd cards)
3) Lots of little bits of code not in the qz80, eg changing the vga screen color
4) An ifdef to add the 20x4 LCD driver code (code already exists)
5) Counters for sd card power down and vga screen blanking (code already exists)
Maybe don't worry about the messy port2 code (eg scanning for #WHO commands) as I'm thinking of changing that to use packets and also changing the MYNAME.TXT file from ALPHA to an IP address eg nnn.nnn.nnn.nnn
I see interrupts. Very nice. As an aside, can you use the standard $38 interrupt in CP/M - I seem to recall that jumps into the middle of some CP/M code?
Could you offer your thoughts please on the Banked Memory problem?
I have an idea of running two instances of CP/M at the same time, and using interrupts to switch between them. That involves preserving the registers for each instance, and also a rule where only one CP/M instance could access the sd card. That would be good enough to run a complex network packet handler code in the background. Of course, the purists would then point to MP/M which can handle each user having different files open at the same time. I never could solve the problem of shared bank memory with the upper 16k common and the lower 48k switched, because the version of zicog I was using was completely full so I couldn't add even one or two lines of pasm. But your code is completely different and it would be very exciting if you could run MP/M. Usually with MP/M each user had a serial port, and on the dracblade it would be easy to have two users at the same time and test it using two USB to serial devices and then two terminal programs running on a PC. You could even have three users, one uses the local keyboard and vga display, one uses serial port 1 and one uses serial port 2. But one could also do cunning things passing bytes between users via OUT commands in the spin code layer.
MP/M exists as an emulation on the SIMH. Do you think it is possible to get it running on the dracblade?
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Most probably, yes. What I would need, either ready or need to write, is a memory abstraction handler doing XMM commands, i.e. read or write a block of memory between hub RAM and external RAM. There is sample code for the TriBlade, RamBlade and DracBlade doing this and a similar piece of code would be required for the Hydra.
With that code I would already have the addressing scheme to use for the core rd_byte and wr_byte routines. As I can't test this without a Hydra, I would need someone to try my changes and possibly debug or fix what I write up.
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Pullmoll's Propeller Projects
1) VGA and VT100. How many cogs does it need? I think 2 are currently free.
2) SD driver. I would have to write the combination with the other platform's XMM and SD code to not divert the code too much. Otherwise the #ifdef mess would get overwhelming.
3) Colors is no problem. I think also other platforms with VGA could use it.
4) This is DracBlade specific and would have to go into a #ifdef section.
5) Not sure about timers. I should probably add a generic timer/event queue where some code can register one shot or periodic events to be called. The question is if this will be possible from PASM, given I switch to PASM LMM code for the I/O handler, which is my goal.
6) $38 is just the default interrupt vector. You could use one of the other RSTs or even place a CALL addr on the data bus. I would have to add support for the latter, since you could have done it on the real Z80.
7) Banking should be possible without too much trouble. The code required should fit into the cog, as it is just one memory range that needs to be diverted. This also requires a rewrite of the I/O code, though, because Spin is too slow for this IMO and the PASM only cog doing I/O is full.
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Pullmoll's Propeller Projects
I only used M80/L80 to compile the Z80 exerciser and tried MBASIC for a simple loop, nothing else. In theory any language that runs on ZiCog should run on this emulation as well.
For the M100 there's the integrate Microsoft BASIC, and for the TRS80 too. It looks like all I ever see is Microsoft products [noparse]:)[/noparse]
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Pullmoll's Propeller Projects
The latest dracblade code I'm using is on the first page, first post, April 1st version http://forums.parallax.com/showthread.php?p=860453
1) an #ifdef for the 20x4 LCD code
2) an #ifdef for the combo cog that does the sd card and ram driver (this might be complicated with what you are doing. What sd card driver do you have?)
3) an #ifdef for the vt100/vga code (uses two cogs)
4) a generic timer to do sd card powerdown, screen blanking and later on, switching between banks.
Would this run out of memory? And if so, have you needed to look at reusing leftover cog space for arrays?
I need to look up how MP/M works - I'll be back...
See attached is the main part of the mp/m source code. 50hz clock. 4 users. I tried running mbasic and it reports the same amount of memory free as in CP/M2.2 so somehow it must be using the banked memory in a cunning way. About 3/4 of the way down is some code that will really test your emulation:
xor a ; <A> := 0 dec a ; <A> := 1111'1111b jp pe,ldir1 ; on an 8080 this means parity is even ldir ; otherwise we have a Z80I think this does an instruction to test the processor
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Post Edited (Dr_Acula) : 4/11/2010 2:12:00 AM GMT
That's the way to go. I will start to write the I/O in PASM LMM now and include the bits that I can identify in your code.
Ok. I'll be looking into that for the generic I/O handler then.
I'm using the same SD card driver, but the separate XMM functions right now. The same would apply for the RamBlade and TriBlade, i.e. they would use the shared SD card driver and their own XMM drivers. That's why I thought that writing the combined SD/XMM driver for the other two platforms is on my TODO list.
Yes, but just an #ifdef VGA, because this isn't just DracBlade specific code.
Right now I'm at 5701 longs. This is running the SIO (multiple ports version), SD card stuff, XMM, my fatfs code and the keyboard driver. What would have to fit is the VGA + VT100 code plus the (new) I/O code. I haven't yet reused the cog space in hub RAM, no. I'll care about this once it's getting too tight in the hub RAM.
Okay. I'll be hacking a new io.spin and watching this space in between.
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Pullmoll's Propeller Projects
5700 longs. I'm at about 6000 with the vga code and reusing cog space for some arrays (but not all!)
The vt100 code in spin can certainly be shrunk. It was written that way so Wordstar would work. There are also some Wyse terminal codes I added that could be removed as they were for Pacman but it was a text version of pacman and I suspect the gamers here will have much better graphics versions. So that code is not needed.
I think the only program that uses VT100 is Wordstar. Maybe half the vt100 codes are not needed. Maybe even start again and just keep running wordstar till it works - I'll bet that could really shrink the vt100 code.
For the moment if it helps, we could even live without the vt100 code. Just very simple VGA code that outputs a byte and scrolls the screen.
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Looking at my code, let's restart and make things simpler:
case io_port ' ledport: 'An 8 bit parallel output with LEDs attached ' out_ledport simhport: 'SIMH control port $FE ' out_simhport condata: 'Console data port $11 out_condata constat: 'Console status port ' out_constat punstat: ' do nothing outputting the status pundata: ' connect CP/M punch to port 2 out_port2 ' output to port 2 = the punch device n8vem_uart_out: '&H68 out_n8vem_byte port2_io: ' for output to port 2 out_port2 port2_baud: ' set baud rate for port 2 baud_port2 Forecolor: ' set the foreground color RRGGBB00 set_forecolor Backcolor: ' set background color RRGGBB00 set_backcolor hdskport: ' $FD out_hdskport 'SIMH style hard disk port myname_port: ' port &H70 GetMyname ' returns board name in DMA 80H Port2_Off: ' port &H71 Port2_Disconnect ' disconnect port 2 controlsimport is needed to be trapped otherwise prints rubbish on the screen but it is commented out.
* punstat and pundata can be commented out for the moment
* n8vem out - keep this
* port2 io - keep this
* baud rate port 2 - probably not needed anymore now I've found these nice 9600 baud radio modules. Is set at startup in spin anyway so no need to change from CP/M
* forecolor and backcolor are useful and are only one line of code each
*hdskport is for the operating system so need this
*myname - leave this out for the moment as I'm going to change this to an IP address format
*port2 off - leave this out too, this is going to be replaced with the packet code so packets turn things on and off
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Links to other interesting threads:
· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
· Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz
First page, first post, Archive 1st April, unzip the spin files and it is vga_1024_vt100 (This hasn't changed in many months and is essentially the Pocketerm code with some lines removed eg up arrow as it doesn't mean anything in CP/M)
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www.smarthome.viviti.com/propeller
I have not yet had time to look at your code and try it on the RamBlade. As soon as I get time I will try it. Thanks.
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Links to other interesting threads:
· Home of the MultiBladeProps: TriBlade,·RamBlade,·SixBlade, website
· Single Board Computer:·3 Propeller ICs·and a·TriBladeProp board (ZiCog Z80 Emulator)
· Prop Tools under Development or Completed (Index)
· Emulators: CPUs Z80 etc; Micros Altair etc;· Terminals·VT100 etc; (Index) ZiCog (Z80) , MoCog (6809)·
· Prop OS: SphinxOS·, PropDos , PropCmd··· Search the Propeller forums·(uses advanced Google search)
My cruising website is: ·www.bluemagic.biz·· MultiBlade Props: www.cluso.bluemagic.biz
I'd rather write my own PASM version of the required ESC sequences.
Including mb_small_spi for SD and XMM will change the way I laid out the objects. When I do it, we should rename the file to something that indicates it is meant for the DracBlade, as I will create dummy objects for the RamBlade and TriBlade from it and at some point fix them to actually do the XMM handling for their platform. I.e. In other words: I want to have compatible object file layout for the targets, or the code would soon become impossible to maintain.
Edit: Okay. I renamed the code to DracBlade_mb_small_spi.spin and changed my fatfs.spin, which is the intermediate layer, to include it instead of the separate XMM and SD objects. It seems to work fine here. Now I can concentrate on the new I/O code, which will then also have just one pointer to the xmm_spi_command long.
I will from now on go with the object name pdo for "platform dependent object" for the combined SD/SPI and XMM code. Using it simplifies code in my current PASM io.spin code and so I may just add the missing ports to it, i.e. VGA text output and LCD.
@Cluso99: Perhaps you have luck getting it running on the RamBlade. No version I tried so far would do anything when started with spin xyz.bin. Perhaps they were all too big? Or I did something very stupid elsewhere. So the code is untested on the RambLade as of yet.
I am aware of the remaining 5 bits, but had no use for them so far. Many opcodes even consist of just one or two addresses, because I rather jump to the next instruction at the end of some code than going through the vector to jump back to #fetch.
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Pullmoll's Propeller Projects
Post Edited (pullmoll) : 4/11/2010 7:45:12 AM GMT
I think the steps are:
1) Start with the simple VGA code that prints a character on the screen.
2) Add code to wrap at the end of the line and scroll the entire screen if on the last character of the bottom line or if a carriage return/lf anywhere on the bottom line.
3) Add the VT100 escape sequence to clear screen and move cursor.
4) Add the small number of extra VT100 codes that Wordstar uses, eg scrolling part of a screen.
I'm excited about the possibility of a 'universal' piece of code that runs on several different platforms.
re the Q and A on the first page
Q) Can I use more than 64KB RAM? I have ...MB on my board.
A) Currently you can't. I will add support for banking to a later revision of the I/O code.
I'm off to study the MP/M code further...
I got MP/M running on the SIMH (it is a program that runs under CP/M 2.2) and mbasic has 19k free instead of 32k. As an aside I managed to sometimes get the two 64k banks of CP/M to switch between each other using out calls, even though I am not preserving the registers at all. It resets CP/M but it does not crash. MP/M does look very complicated - even the bank switching to keep the top 16k as common memory will need changes to ram driver code in two places. Having two seperate CP/M 64k programs running may end up being easier. I just have to work out how to preserve the registers that are in the Z80 cog. Or maybe MP/M is the better way??? Attached is a package of MPM files. The Word and PDF instructions. Run MPM.BAT and then run Teraterm and they should attach to each other. Then run MPM from the A> prompt.
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Post Edited (Dr_Acula) : 4/11/2010 11:03:06 AM GMT