{ TACHYON V1.1 C3 SPI Application Vocaulary Nicholas G. Lordi 9/2012 Words are included to access the following C3 SPI devices: two 232 KByte banks of SRAM (Microchip 23K256), 1 MByte flash memory (Atmel AT26DF081A ), a 2 channel A/D converter (MCP3202) and a USD card interface. After loading, execute SPI to initialize the spi engine. } : C3SPI.fth ." C3 SPI Words and Applications 120915.2000" ; '' SPI WORDS '' C3 pin assignments. #11 MASK CONSTANT .sclk #10 MASK CONSTANT .miso #9 MASK CONSTANT .mosi #8 MASK CONSTANT .spck #25 MASK CONSTANT .spcs '' Utility variables BYTE chan \ ( n1 -- ) Select channel: n1 is 1 - SRAM bank 0 2 - SRAM bank 1 3 - FLASH 4 - ADC 5 - SD CARD : SPSET chan C! ; \ ( on/off -- ) Selects\Deselects C3 spi channels : SPSEL .spcs OUTCLR .spcs OUTSET IF .spck OUTCLR chan C@ 0 DO .spck OUTSET .spck OUTCLR LOOP THEN ; \ ( n1 -- ) n1 is the number of bits to be transmitted. : SPCNT 3 COGREG! ; \ ( -- ) Initialize spi engine (2.8 MHz). : SPI #8 3 COGREG! .miso 2 COGREG! .mosi 1 COGREG! .sclk 0 COGREG! .mosi OUTCLR .sclk OUTCLR ; \ ( -- ) Executes kernel spi engine. : SPIO [SPIO] RUNMOD ; \ ( -- b ) Leaves 1 byte on stack. : SP@ -1 SPIO $FF AND ; \ ( b -- ) Sends 1 byte to device. : SP! #24 SHL SPIO DROP ; \ ( w -- ) Sends 1 word or a 2 byte address to device. : SP2! DUP #8 SHR SP! SP! ; \ ( a -- ) Sends 3 byte address to device. : SP3! DUP 10 SHR SP! DUP 8 SHR SP! SP! ; \ ( l -- ) Sends 1 long to device. : SP4! #32 SPCNT SPIO DROP #8 SPCNT ; \ ( -- w ) Leaves 1 word on stack. : SP2@ SP@ #8 SHL SP@ OR ; \ ( -- a ) Leaves 3 byte address on stack. : SP3@ #24 SPCNT -1 SPIO 8 SPCNT $FFFFFF AND ; \ ( -- l ) Leaves 1 long on stack. : SP4@ #32 SPCNT -1 SPIO 8 SPCNT $FFFFFFFF AND ; { API - C3 Memory Channels 0 - 3 } '' Page addresses for flash & sram. LONG paddr BYTE fs '' Define page and sector sizes in bytes. #32 CONSTANT spage \ sram page size #256 CONSTANT page \ flash page size #4096 CONSTANT block \ flash block size '' The following constants reference the read/write SRAM modes which are written '' to the SRAM status register. %00000001 CONSTANT BM \ default byte mode %10000001 CONSTANT PM \ 32 byte page mode %01000001 CONSTANT SM \ sequential mode '' Define input and output buffers as page sizes. TABLE inbuf page ALLOT TABLE outbuf page ALLOT '' Utilities \ ( n1 n2 -- ) Set flash page n1 (0 - 255) address in block n2 (0-31). pub PGAD page * SWAP block * + paddr ! ; \ ( n1 -- ) Set sram page 1 (0 - 255) address . pub SPGAD spage * paddr ! ; \ ( -- ) Clear input buffer. pub INBUF inbuf page 0 FILL ; \ ( -- ) Clear output buffer. pub OUTBUF outbuf page 0 FILL ; \ ( n1 - ) Increment page address where n1 is 1, 2, or 4. pri PADDR+ paddr @ + paddr ! ; { Memory Access Words } \ ( -- id ) Leaves memory id on stack. Pmod-SF: $202015 Pmod-SF2: $20DA18 pub RDID ON SPSEL $9F SP! SP3@ OFF SPSEL ; \ ( -- ) Write Enable instruction. pri WREN ON SPSEL $06 SP! OFF SPSEL ; \ ( -- ) Write Disable instruction. : WRDI ON SPSEL $04 SP! OFF SPSEL ; \ ( -- b ) Read status register. Leaves byte b on stack pub RDSR ON SPSEL $05 SP! SP@ OFF SPSEL ; \ ( b -- ) Write byte b to status register. pub WRSR WREN ON SPSEL $01 SP! SP! OFF SPSEL ; \ ( n1 -- ) Erase sector n1 (0 - 31). Sets all bits in sector to 1. pub BE WREN ON SPSEL $D8 SP! block * SP3! OFF SPSEL ; \ ( -- ) Chip (bulk) erase. Sets all bits to 1. pub CE WREN ON SPSEL $C7 SP! OFF SPSEL ; \ ( -- ) Select flash memory as spi device. pub FLASH 3 SPSET 0 fs C! ; \ ( -- ) Select sram bank 0 as spi device. pub SRAM0 1 SPSET 1 fs C! ; \ ( -- ) Select sram bank 1 as spi device. pub SRAM1 2 SPSET 1 fs C! ; '' The following commands implement the memory read instructions. \ ( -- ) Set flash READ command (3 byte address). pri FRD $03 SP! paddr @ SP3! ; \ ( -- ) Set sram Read command (2 byte address). pri SRD $03 SP! paddr @ SP2! ; \ ( -- ) Execute read. pri RD fs C@ 0= IF FRD ELSE SRD THEN ; \ ( -- b ) Read 1 byte from memory at paddr, incrementing the page address. pub READ ON SPSEL RD SP@ OFF SPSEL 1 PADDR+ ; \ ( -- w ) Read 1 word from memory at paddr. pub WREAD ON SPSEL RD SP2@ OFF SPSEL 2 PADDR+ ; \ ( -- l ) Read 1 long from mempry at paddr. pub LREAD ON SPSEL RD SP4@ OFF SPSEL 4 PADDR+ ; \ ( -- ) Set Page Programming command for flash. pri FPP $02 SP! paddr @ SP3! ; \ ( -- ) Set Page Programming command for sram. pri SPP $02 SP! paddr @ SP2! ; \ ( -- ) Execute write. pri PP fs C@ 0= IF FPP ELSE SPP THEN ; \ ( b -- ) Write 1 byte to memory at paddr, incrementing the page address. pub WRITE WREN ON SPSEL PP SP! OFF SPSEL 1 PADDR+ ; \ ( w -- ) Write 1 word to memory at paddr. pub WWRITE WREN ON SPSEL PP SP2! OFF SPSEL 2 PADDR+ ; \ ( l -- ) Write 1 long to memory at paddr. pub LWRITE WREN ON SPSEL PP SP4! OFF SPSEL 4 PADDR+ ; { API ADC } '' The follow words define the adc operational modes. %1101 CONSTANT M1 \ single input AN0 %1111 CONSTANT M2 \ single input AN1 %1001 CONSTANT M3 \ differential input + %1011 CONSTANT M4 \ differential input - \ ( mode -- integer) Modes M1-M4 leave 0 -4095 0n stack. pub RDATA ON SPSEL SP! SP4@ OFF SPSEL #19 SHR ; \ ( -- ) Execute ADC to access the MCP3202 chip. pub ADC 4 SPSET END { SD Card API Channel 5 Load 'SDCARD_MOD.fth' which has been modified to be compatible with this SPI version. Execute SD to initialize. }