Recursive fibo.c
----------------

unsigned int fibo (unsigned int n)
{
    if (n < 2)
    {
        return (n);
    }
    else
    {
        return fibo(n - 1) + fibo(n - 2);
    }
}

RISCV 32 bit       : 25 instructions
------------------------------------

00000000 <fibo>:
   0:   fe010113                addi    sp,sp,-32
   4:   00812c23                sw      s0,24(sp)
   8:   00912a23                sw      s1,20(sp)
   c:   01212823                sw      s2,16(sp)
  10:   01312623                sw      s3,12(sp)
  14:   00112e23                sw      ra,28(sp)
  18:   00050413                mv      s0,a0
  1c:   00050493                mv      s1,a0
  20:   00000913                li      s2,0
  24:   00100993                li      s3,1

00000028 <.L3>:
  28:   0099fe63                bleu    s1,s3,44 <.L2>
  2c:   fff48513                addi    a0,s1,-1
  30:   00000297                auipc   t0,0x0
  34:   000280e7                jalr    t0
  38:   ffe48493                addi    s1,s1,-2
  3c:   00a90933                add     s2,s2,a0
  40:   fe9ff06f                j       28 <.L3>

00000044 <.L2>:
  44:   01c12083                lw      ra,28(sp)
  48:   00147513                andi    a0,s0,1
  4c:   00a90533                add     a0,s2,a0
  50:   01812403                lw      s0,24(sp)
  54:   01412483                lw      s1,20(sp)
  58:   01012903                lw      s2,16(sp)
  5c:   00c12983                lw      s3,12(sp)
  60:   02010113                addi    sp,sp,32
  64:   00008067                ret


Propeller COG mode @ -Os : 31 instructions
------------------------------------------
00000050 <_fibo>:
  50:   0420fc84                        sub     40 <sp>, #4 
  54:   10183c08                        wrlong  30 <r12>, 40 <sp> 
  58:   0420fc84                        sub     40 <sp>, #4 
  5c:   101a3c08                        wrlong  34 <r13>, 40 <sp> 
  60:   0420fc84                        sub     40 <sp>, #4 
  64:   101c3c08                        wrlong  38 <r14>, 40 <sp> 
  68:   0420fc84                        sub     40 <sp>, #4 
  6c:   101e3c08                        wrlong  3c <lr>, 40 <sp> 
  70:   001afca0                        mov     34 <r13>, #0 
  74:   0018bca0                        mov     30 <r12>, 0 <r0> 
  78:   001cbca0                        mov     38 <r14>, 0 <r0> 

0000007c <.L3>:
  7c:   011c7c87                        cmp     38 <r14>, #1 wz, wc
  80:   2700785c        if_be           jmp     #9c <.L2> 
  84:   0e00bca0                        mov     0 <r0>, 38 <r14> 
  88:   0100fc84                        sub     0 <r0>, #1 
  8c:   021cfc84                        sub     38 <r14>, #2 
  90:   141efc5c                        jmpret  3c <lr>, #50 <_fibo> 
  94:   001abc80                        add     34 <r13>, 0 <r0> 
  98:   1f007c5c                        jmp     #7c <.L3> 

0000009c <.L2>:
  9c:   0c00bca0                        mov     0 <r0>, 30 <r12> 
  a0:   0100fc60                        and     0 <r0>, #1 
  a4:   0d00bc80                        add     0 <r0>, 34 <r13> 
  a8:   101ebc08                        rdlong  3c <lr>, 40 <sp> 
  ac:   0420fc80                        add     40 <sp>, #4 
  b0:   101cbc08                        rdlong  38 <r14>, 40 <sp> 
  b4:   0420fc80                        add     40 <sp>, #4 
  b8:   101abc08                        rdlong  34 <r13>, 40 <sp> 
  bc:   0420fc80                        add     40 <sp>, #4 
  c0:   1018bc08                        rdlong  30 <r12>, 40 <sp> 
  c4:   0420fc80                        add     40 <sp>, #4 
  c8:   0f003c5c                        jmp     3c <lr> 




















Ppropeller COG mode:     

108c8:       8181a703                lw      a4,-2024(gp) # 110f8 <x>
108cc:       81c1a783                lw      a5,-2020(gp) # 110fc <x+0x4>
108d0:       8101a803                lw      a6,-2032(gp) # 110f0 <y>
108d4:       8141a883                lw      a7,-2028(gp) # 110f4 <y+0x4>
108d8:       010706b3                add     a3,a4,a6
108dc:       00e6b5b3                sltu    a1,a3,a4
108e0:       01178633                add     a2,a5,a7
108e4:       00068713                mv      a4,a3
108e8:       00c587b3                add     a5,a1,a2
108ec:       80e1a423                sw      a4,-2040(gp) # 110e8 <z>
108f0:       80f1a623                sw      a5,-2036(gp) # 110ec <z+0x4>


Intel 32 bit doing 64 bit addition: 42 bytes.

80482f6:       8b 15 54 96 04 08       mov    0x8049654,%edx
80482fc:       8b 0d 48 96 04 08       mov    0x8049648,%ecx
8048302:       89 e5                   mov    %esp,%ebp
8048304:       53                      push   %ebx
8048305:       8b 1d 4c 96 04 08       mov    0x804964c,%ebx
804830b:       83 e4 f8                and    $0xfffffff8,%esp
804830e:       01 c8                   add    %ecx,%eax
8048310:       11 da                   adc    %ebx,%edx
8048312:       8b 5d fc                mov    -0x4(%ebp),%ebx
8048315:       a3 40 96 04 08          mov    %eax,0x8049640
804831a:       89 15 44 96 04 08       mov    %edx,0x8049644