fl

{
MCP3204(12bit serial A/D converter)
    PropForth 5.0 
    Forth word
    04/05/2012 00:52:16
    
    Dout -- 2.2kohm ----|
                        |
    Din  ---------------|--- P1
    
}

hex

0 wconstant _cs         
1 wconstant _dpin          
2 wconstant _clk
                                                         
1 _dpin lshift constant _dpinm
 
1 wconstant single
0 wconstant diff

: _cs_out_l _cs pinlo ;
: _cs_out_h _cs pinhi ;
: _dpin_out_l _dpin pinlo ;
: _dpin_out_h _dpin pinhi ;
: _clk_out_l _clk pinlo ;
: _clk_out_h _clk pinhi ;
: clk_out _clk_out_h _clk_out_l ;



\ Get data from MCP3204
\ ( n1 n2 -- )   n1:single/diff  n2:channel [0 - 3]
{
n1:1
single_end input for MCP3204
0: CH0
1: CH1
2: CH2
3: CH3

n1:0
differencial input for MCP3204
0: CH0=IN+ CH1= IN-
1: CH0=IN- CH1= IN+
2: CH2=IN+ CH3= IN-
3: CH2=IN- CH3= IN+
}
: get_A/D   
_cs_out_l
swap if 18 or then
10 
5 0 do
     2dup and
     if
          _dpin_out_h
     then
     clk_out
     1 rshift 
     _dpin_out_l
loop
2drop

\ set _dpin to input 
_dpin pinin
\ dummy clock
clk_out

\ receive data
0
D 0 do
     1 lshift
     clk_out
     ina COG@ _dpinm and 0> if 1+ then
loop
1 rshift
_cs_out_h
\ set _dpin to output 
_dpin pinout
;

: disp_VR
_cs 3 0 do dup pinout 1+ loop drop
_cs_out_h
 
begin
single 0 get_A/D   
64 delms
3E7 u* FFF u/ 
. cr
fkey? swap drop     
until
;
    
\ ( n1 n2 n3 n4 n5 -- n6 )  
\ n1:channel number  n2:single/differential   n3:_dpin  n4:_clk  n5:_cs  n6:result
lockdict create a_test forthentry
$C_a_lxasm w, h13D  h113  1- tuck - h9 lshift or here W@ alignl h10 lshift or l,
z2WyPW1 l, zfiPZB l, z1SyLI[ l, z2WyPb1 l, zfiPeB l, z1SyLI[ l, z2WyPj1 l, zfiPmB l,
z1SyLI[ l, z2WiPuB l, z1SyLI[ l, z1YyPr1 l, z20yPOG l, z20oPO8 l, zfyPOR l, z2WyPr5 l,
z1[ixZC l, zgyPO1 l, z1bfxZD l, z1Sya[p l, z1[ixZD l, z3[yPv[ l, z1[ixmD l, z1Sya[p l,
z2WyPrD l, zfyPO1 l, z1Sya[p l, 0 l, z1YFPil l, z20oPO1 l, z3[yPvf l, zbyPO1 l,
z1bixZC l, z1bixmD l, z1SV01X l, z1bixZE l, z2WiQFk l, z20yQ8G l, z3ryQ80 l, z1[ixZE l,
z1SF04v l, 0 l,
freedict

: disp_VR_asm
_cs 3 0 do dup pinout 1+ loop drop
_cs_out_h
 
begin
0 single _clk _dpin _cs a_test      
64 delms
3E7 u* FFF u/                                                
 . cr
fkey? swap drop     
until
;


decimal

{
( n1 n2 n3 n4 n5 -- n6 )  n1:channel number  n2:single/differential   n3:_clk  n4:_dpin  n5:_cs  n6:result
fl
build_BootOpt :rasm
               \ get cs_mask
          mov       $C_treg1 , # 1
          shl       $C_treg1 , $C_stTOS
               \ set cs to Hi
          spop
               \ get dpin_mask
          mov       $C_treg2 , # 1
          shl       $C_treg2 , $C_stTOS
          spop
               \ get clk_mask
          mov       $C_treg3 , # 1
          shl       $C_treg3 , $C_stTOS
          spop
               \ check single/differential
          mov       $C_treg4 , $C_stTOS
               \ [caution] Z-flag change after spop
          spop
          and       $C_treg4 , # 1 wz
               \ add channel number
          add       $C_stTOS , # h10
if_nz     add       $C_stTOS , # h8
          
         
               \ send data to MCP3204
          shl       $C_stTOS , # d27     
          mov       $C_treg4 , # 5
               \ set cs to Lo
          andn      outa ,  $C_treg1
\ send control data [start_bit + SGL/DIFF + channel]
__1
          shl       $C_stTOS , # 1 wc
               \ set dpin to Hi/Lo
if_c      or        outa , $C_treg2
               \ out clk-pulse              
          jmpret    __retAddr , # __clk_out
          andn      outa , $C_treg2
          djnz      $C_treg4 , # __1
          
               \ set dpin to input        
          andn      dira , $C_treg2
               \ dummy clock
          jmpret    __retAddr , # __clk_out     

\ receive data
          mov       $C_treg4 , # d13
__2
          shl       $C_stTOS , # 1
               \ clock out
          jmpret    __retAddr , # __clk_out
          nop
          test      $C_treg2 , ina wz
if_nz     add       $C_stTOS , # 1
          djnz      $C_treg4 , # __2
               
          shr       $C_stTOS , # 1
          
               \ set cs to Hi
          or        outa , $C_treg1
               \ set dpin to output
          or        dira , $C_treg2                    
          jexit
          
__clk_out
          or        outa , $C_treg3 
          mov       $C_treg6 , cnt
          add       $C_treg6  , # d16
          waitcnt   $C_treg6 , # 0          
          andn      outa , $C_treg3
          jmp       __retAddr
          
__retAddr
0
                         
;asm a_test

}