**************************************************** * * * P1V_TOOLBOX - Verilog code generator * * Version 0.2 * * April 2015 Ozpropdev * * * * * **************************************************** Overview ======== p1_toolbox is a console application that generates verilog code based on a configuration set by the user. The generated files are based on Chip's master verilog files. Depending on the configuration selected certain parts pf the codes are either modified or commented out. Any changes to the code are marked by a "<=-" with the reason for the change. All builds use an unscrambled "high" rom which allows modification via .binary files generated from Chip's original source using Propeller Tool. Installation ============ 1. Extract files in the zipped folder into a folder called "C:\P1_FPGA" 2. Run setup.exe from c:\P1_FPGA Verilog code generation example ================================ When p1_toolbox starts you will be prompted with a ">" command prompt To build a 4 Cog,64IO,3 counter,56k hub P1 on a BeMicro CV board. >new demo >target cv >cogs 4 >video - >ctr 3 >portb + >hub 56 >rom myrom >build >save >bye This will generate all the files needed in the folder c:\p1_fpga\demo In Quartus II create a new project from these files. To attach peripherals use the Quartus block editor or use then pin assignment tools in p1_toolbox. ----------------------------------------------------------------------------------- COMMANDS ========= ? Display all available commands by category Sample output : >? ROM related commands ==================== char Enable/Disable char rom romsize Set high tom size in k makerom Make .hex high rom file loadbin Load PASM/Spin binary file loadhex Load HEX file rom Set high rom filename savehex Save hub image data to a hex file comphex Compare hex file(s) hex List available hex files more? (n)o (a)ll ?a Hub memory related commands =========================== hub Set hub ram size in k dump HEX/ASCII dump of rom contents text Insert ascii text into rom image zspin Fill spin interpreter area with 00's zboot Fill boot area with 00's zall Fill high rom with 00's spin Dump spin area boot Dummp boot area Clock related commands ====================== mhz View clock speed or suggest PLL settings mul Set PLL multiplier value div Set PLL divider value Pin assignment commands ======================= add Attach peripheral (toy) to project remove Remove pins from project flip Flip order of selected pins swap Swap two pin assignments shuffle Shuffle order of entitys pins pins List assigned pins fpga List all pins by FPGA pin names signals List pins by signal name order List pins by loaded order compact Remove all unused pins between assignments savepins Save pin assignments loadpins Load pin assignments loadqsf Load pin assignments in qsf file loadtoys Load peripherals (toys) toys Show avialable toys Port related commands ===================== portb Enable/Disable PortB function portc Enable/Disable PortC function/direction portd Enable/Disable PortD function/direction stats Show port usage information Cog configuration commands ========================== asym Enable/Disable asymmetrical cog mode view View current cog configuration map Show memory map of hub/rom sapce regs Show register map for cog cogs Set number of cogs ctr Set number of counters per cog leds Invert cog leds (BeMicro boards) video Enable/Disable video block Build and file related commands =============================== save Save project target Set target FPGA board top Set top entity name new Start new project ver Set propeller Version number build Build verilog files files List saved projects check Pre compile check Misc. commands ============== bye Exit from program cls Clear console = Display current configuration info Display project infomation > ----------------------------------------------------------------------------------- INFO Displays the current project information Sample output: >info Source path : c:\p1_fpga Project name : fff.p1v Destination : c:\p1_fpga\fff Target : Terasic DE2-115 Family : Cyclone IV E Device : EP4CE115F29C7 Program mode : Active serial Configuration device : EPCQ64 Top entity name : top Cogs = 8 Counters = 2 Video is enabled Hub ram 48k Character rom is disabled High ROM size = 4k ($F000 to $FFFF) Custom High_ROM filename : c:\p1_fpga\fff\myrom.hex PortB (64 I/O) is enabled Propeller Version number = 123 PLL multipler = 16 PLL divider = 3 Clock frequency = 266.6667 MHz (133.3333 MHz) Invert Cog LEDS is disabled Toy filename : de2.toys Pin filename : fff.pins Asymmetrical cog mode is enabled > ----------------------------------------------------------------------------------- COGS Sets the number of cogs in the P1. Valid range is 1 to 8 To get current number of cogs use "cogs" with no value Sanple output : >cogs 3 Cogs = 3 > See also INFO,VIEW commands ----------------------------------------------------------------------------------- CTR Sets the number of counters per cog. Valid range is 0 to 4. Symmetrical cog mode : >ctr 2 'All cogs have 2 counters each Asymmetrical mode : >ctr 1 'All cogs have only 1 counter each > ctr 4 3 'Cog #4 has 3 counters >ctr 2 5 1 'Cog #2 to #5 have 1 counter each *NOTE* 3 counters requires video to be disabled and PORTC disabled. 4 counters requires video to be disabled and both PORTB/PORTD disabled. Counter C & D registers are mapped as follows +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1F0 | PAR | CTRC | | 1F1 | CNT | CTRD | | 1F2 | INA | FRQC | | 1F3 | INB | FRQD | | 1F4 | ram | ram+OUTA | | 1F5 | ram | ram+OUTB | | 1F6 | ram | ram+DIRA | | 1F7 | ram | ram+DIRB | | 1F8 | ram | ram+CTRA | | 1F9 | ram | ram+CTRB | | 1FA | ram | ram+FRQA | | 1FB | ram | ram+FRQB | | 1FC | PHSA | ram+PHSA | | 1FD | PHSB | ram+PHSB | | 1FE | PHSC | ram+PHSC | | 1FF | PHSD | ram+PHSD | +-------------------------------+ See also REGS,VIEW commands ----------------------------------------------------------------------------------- VIDEO Enables or disables video block in specific cog(s) :Examples : Symmetrical mode >video - 'Disable video block >video + 'Enable video block Example : Asymmetrical mode >video + 'Enable video blocks in all cogs >video - 'Disable video blocks in all cogs >video 5 + '#nable video in cog #5 >video 2 5 - 'Dsiable video in cog #2 to cog #5 See also VIEW,CTR,PORTB,PORTC,PORTD ----------------------------------------------------------------------------------- CHAR Enables or disables the 16K chracter rom ($8000 to $BFFF) Use with no parameter to view current status. Sample output : >char Character rom is enabled >char - Character rom is disabled >char + Character rom is enabled > *Note Hub ram sizes > 32k require disabling the chracter rom. See also MAP,HUB commands ----------------------------------------------------------------------------------- HUB Sets the hub ram size in K To view current hub size use with no value or use "MAP" command Sample output : >hub Hub ram 48k >hub 128 Hub ram 128k >map +------------------------------+ $00000: | | | 60k Hub RAM | $0EFFF: | | +------------------------------+ $0F000: | | | 4k Spin/Booter ROM | | myrom.hex | $00FFF: | | +------------------------------+ $10000: | | | +64k Extra Hub RAM | $2FFFF: | | +------------------------------+ > *Note Hub ram sizes > 32k require disabling the chracter rom. See also MAP,ROMSIZE commands ----------------------------------------------------------------------------------- ROMSIZE Sets the "high" rom size in K Reducing the "high" rom to 4K removes the sin/log tables. To view current rom size use with no value or use "MAP" command Sample output : >romsize High ROM size = 16k ($C000 to $FFFF) >romsize 4 High ROM size = 4k ($F000 to $FFFF) >romsize 16 High ROM size = 16k ($C000 to $FFFF) > +------------------------------+ $0F000: | | | 4k Spin/Booter ROM | | myrom.hex | $00FFF: | | +------------------------------+ *NOTE* For hub ram sizes > 48k high rom needs to reduced to 4k in size. See also ROM,MAP,INFO commands ----------------------------------------------------------------------------------- ROM Set the filename of the "high" rom hex file. This will be the name of the rom image in the saved project. To view current high rom filename use with no additional parameters The "MAP" command also shows the current high rom filename Sample output : >rom Custom High_ROM filename : c:\p1_fpga\fff\myrom.hex >rom max10z Custom High_ROM filename : c:\p1_fpga\fff\max10z.hex > +------------------------------+ $0F000: | | | 4k Spin/Booter ROM | | myrom.hex | $00FFF: | | +------------------------------+ See also INFO,MAP commands ----------------------------------------------------------------------------------- DUMP Hex/ascii dump of rom images. Example usage >dump e200 e220 sample output: FF00: 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D ================ FF10: 20 43 6F 70 79 72 69 67 68 74 20 32 30 30 35 20 Copyright 2005 FF20: 20 50 61 72 61 6C 6C 61 78 2C 20 49 6E 63 2E 20 Parallax, Inc. FF30: 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D ---------------- FF40: 77 77 77 2E 70 61 72 61 6C 6C 61 78 2E 63 6F 6D www.parallax.com FF50: 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D ================ FF60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ FF70: 3F A5 3F C6 80 38 08 E2 38 02 E3 3F A7 3F 86 38 ?.?..8..8..?.?.8 *See also SPIN,BOOT and RUNNER commands ----------------------------------------------------------------------------------- BUILD Build verilog files based on current configuration. A pin assignment file (.qsf) will be created. Also a .spin file is created with "CON" blocks containing pin assignments. Use "ROM" command to set high rom filename before build Sample output : >build ROM modified. Save as "c:\p1_fpga\fff\myrom.hex" (y or n)?y c:\p1_fpga\fff\myrom.hex saved in 4096 bytes. c:\p1_fpga\fff\top.tdf build OK c:\p1_fpga\fff\dig.v build OK c:\p1_fpga\fff\cog_C2.v build OK c:\p1_fpga\fff\cog_C2C.v build OK c:\p1_fpga\fff\cog_C2B.v build OK c:\p1_fpga\fff\cog_C2D.v build OK c:\p1_fpga\fff\cog_C2V.v build OK c:\p1_fpga\fff\cog_ctr.v build OK c:\p1_fpga\fff\hub_mem.v build OK c:\p1_fpga\fff\hub.v build OK c:\p1_fpga\fff\dig.inc build OK c:\p1_fpga\fff\top.spin build OK c:\p1_fpga\fff\fff.qsf build OK Build complete. > ----------------------------------------------------------------------------------- SAVE Save the current configuration info using then project name defined by "NEW" Sample output : >save c:\p1_fpga\fff.p1v already exists. Overwrite (Y or N) ?y c:\p1_fpga\fff.p1v saved > *NOTE* Make sure to use a "SAVEPINS" command before you "SAVE" your project. ----------------------------------------------------------------------------------- LOADHEX Load a HEX format file into rom space Requires a filename (defailts to .hex) If destination address is omitted $c000 is default *NOTE* Be aware of rom size and destination address. 16k rom load to c000 4k rom load to f000 Sample output : Loading a 4k rom file >loadhex c:\p1_fpga\fff\myrom f000 Loading c:\p1_fpga\fff\myrom.hex .. @$F000 4096 bytes .. Ok High_ROM filename : c:\p1_fpga\fff\myrom.hex > See also BOOT,SPIN,RUNNER commands ----------------------------------------------------------------------------------- LOADBIN Load a .binary file into rom space Preset names "spin","boot" can be used instead of hex addresses. Exampe usage >loadbin interpreter spin 'Loads binary @ c000 >loadbin interpreter f004 >loadbin booter.binary boot 'Loads binary tp f004 *See also ZALL,ZSPIN,ZBOOT See "Generating .binary files" ----------------------------------------------------------------------------------- VER Set the Propeller Version number as seen by the Propeller Tool. Valid numbers range from 0 to 255. Value is tored in high rom @ ffff and saved in rom file Use with no parameter to view current value Sample output : >ver Propeller Version number = 1 >ver 115 Propeller Version number = 115 > ----------------------------------------------------------------------------------- PORTB Enabled/Disables the PORTB implementation To view the current status use this command without a switch parameter Example usage : Symmetrical mode PORTB + 'Enable PORTB function PORTB - 'Disable PORTB function Example usage : Asymmetrical mode PORTB + 'Enable all cogs PORTB function PORTB - 'Disable all cogs PORTB function PORTB 3 + 'Enable PORTB function on cog #3 PORTB 2 6 + 'Enable PORTB function on cogs #2 to #6 Sample output : Symmetrical mode >portb PortB (64 I/O) is disabled >portb + PortB (64 I/O) is enabled >portb - PortB (64 I/O) is disabled > Sample output : Asymmetrical mode >portb 2 5 + Cog #2 PortB is enabled Cog #3 PortB is enabled Cog #4 PortB is enabled Cog #5 PortB is enabled >portb - Cog #0 PortB is disabled Cog #1 PortB is disabled Cog #2 PortB is disabled Cog #3 PortB is disabled Cog #4 PortB is disabled Cog #5 PortB is disabled Cog #6 PortB is disabled Cog #7 PortB is disabled > All PortB registers are mapped as shown in REGS output +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1F3 | INB | ram | | 1F5 | ram | ram+OUTB | | 1F7 | ram | ram+DIRB | +-------------------------------+ See also VIEW,REGS commands ----------------------------------------------------------------------------------- TEXT Allows text entry of strings into rom space. Useful for configuration message buried in rom Example uasge >text fe00 ozpropdev was here sample output: FE00: 6F 7A 70 72 6F 70 64 65 76 20 77 61 73 20 68 65 ozpropdev was he FE10: 72 65 00 00 00 00 00 00 00 00 00 00 00 00 00 00 re.............. FE20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ FE30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ FE40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ FE50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ FE60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ FE70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ ----------------------------------------------------------------------------------- TARGET Sets the target board details and defualts To view available options use with no parameter. Sample output : >target 1 : nano 2 : de2_115 3 : be_cv 4 : be_max10 5 : de0_cv 6 : p123 > Example : To set the target board to DE2-115 >target 2 "de2.toys" loaded Ok. Source path : c:\p1_fpga Project name : jjj Destination : c:\p1_fpga\jjj Target : Terasic DE2-115 Family : Cyclone IV E Device : EP4CE115F29C7 Program mode : Active serial Configuration device : EPCQ64 Top entity name : top Cogs = 8 Counters = 2 Video is enabled Hub ram 32k Character rom is enabled High ROM size = 16k ($C000 to $FFFF) High_ROM filename : c:\p1_fpga\unscrambled.hex PortB (64 I/O) is disabled Propeller Version number = 1 PLL multipler = 16 PLL divider = 5 Clock frequency = 160 MHz (80 MHz) Invert Cog LEDS is disabled Toy filename : de2.toys Pin filename : Asymmetrical cog mode is disabled > ----------------------------------------------------------------------------------- NEW Starts a new configuration (project) and sets name if supplied. Loads the default "high" rom image - "unscarambled.hex" Example usage >new > new demo1 *See also NAME,SAVE ----------------------------------------------------------------------------------- FILES Show all available project files Example uasge >files *Note To load a project type its name at the command prompt ----------------------------------------------------------------------------------- CLS Clears the console window Example usage >cls ----------------------------------------------------------------------------------- TOP Sets the name of the top entity. This will be the top entity in your project in Quartus. i.e "mymax10.tdf" Example usage >top mymax10 ----------------------------------------------------------------------------------- PATH Displays the source and destination folder names Example usage >path ----------------------------------------------------------------------------------- MAKEROM Builds a Intel HEX file image of the "high" rom in the current project folder using the supplied name and size. Size is in k. Sample output : >makerom testrom 4 c:\p1_fpga\fff\testrom.hex saved in 4096 bytes. Custom High_ROM filename : c:\p1_fpga\fff\testrom.hex > See also ROMSIZE,ROM commands ----------------------------------------------------------------------------------- BYE Exits p1_toolbox Example usage >bye ----------------------------------------------------------------------------------- ZALL Fill high rom space with zeroes Address range from $f000 to $ffff ----------------------------------------------------------------------------------- ZSPIN Fill "interpreter" space with zeroes Address range from $f004 to $f7ff ----------------------------------------------------------------------------------- ZBOOT Fill "booter" space with zeroes Address range from $f800 to $ff7f ----------------------------------------------------------------------------------- SPIN Hex dump of "interpreter" code in memory from $F004 to $F7FF Equivalent to >DUMP F004 F7FF ----------------------------------------------------------------------------------- BOOT Hex dump of "booter" code in memory from $F800 to $FF7F Equivalent to >DUMP F004 F7FF ----------------------------------------------------------------------------------- RUNNER Hex dump of the spin "runner" code in memory from $FF80 to $FFFF Equivalent to >DUMP F004 F7FF ----------------------------------------------------------------------------------- MUL Sets the PLL multiplier value. Clock speed = 50MHz * mul value / div value * 16 / 5 = 160 MHz (80 MHz) * 16 / 4 = 200 MHz (100 MHz) * 16 / 3 = 266 MHz (133 MHz) Example uasge >mul 18 Sample output: >mul 18 PLL multipler = 18 Clock frequency = 180 MHz (90 MHz) > *See also DIV ----------------------------------------------------------------------------------- DIV Sets the PLL divider value. Clock speed = 50MHz * mul value / div value * 16 / 5 = 160 MHz (80 MHz) * 16 / 4 = 200 MHz (100 MHz) * 16 / 3 = 266 MHz (133 MHz) Example uasge >div 5 Sample output: >div 3 PLL divider = 3 Clock frequency = 266.6667 MHz (133.3333 MHz) > *See also MUL ##################################################################################- ##################################################################################- ##################################################################################- Whay's new in Version 0.2 ========================= 1. Pin assignment tools 2. Asymmetrical cog builds 3. >64k Hub ram generation 4. "dig.inc" file is now generated. 5. Assorted new tools and refinements ----------------------------------------------------------------------------------- Port pin assignment labels pa Refers to a pin on PortA : Ranges pa0..pa31 pb refers to a pin on PortB : Ranges pb0..pb31 pc refers to a pin on PortC : Ranges pc0..pc31 pd Refers to a pin on PortD : Ranges pd0..pd31 px Refers to a pin on cog_led outputs : Range px0..px7 Use of ? indicates the first available pin of the nominated Port. For example if pb0 to pb5 are already assigned, pb? would represent pb6. ----------------------------------------------------------------------------------- PORTC Enabled/Disables the PORTC implementation PORTC has no individual direction control, so all pins can either be all input or all output. A mix of directions is not implemented. PORTC is mapped to cog register $1FE. (See "REGS" command) PORTC can only be used on cogs with the video function disabled. Example usage : Symmetrical mode PORTC + 'Enable PORTC function PORTC - 'Disable PORTC function PORTC IN 'Set PORTC direction to input PORTC OUT 'Set PORTC direction to output Example usage : Asymmetrical mode PORTC + 'Enable all cogs PORTC function PORTC - 'Disable all cogs PORTC function PORTC 3 + 'Enable PORTC function on cog 3 PORTC 2 6 + 'Enable PORTC function on cogs 2 to 6 PORTC IN 'Set PORTC direction to input PORTC OUT 'Set PORTC direction to output PortC input mode : +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1FE | PORTC | ram | +-------------------------------+ PortC output mode +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1FE | ram | PORTC | +-------------------------------+ See also VIEW,REGS ----------------------------------------------------------------------------------- PORTD Enabled/Disables the PORTD implementation PORTD has no individual direction control, so all pins can either be all input or all output. A mix of directions is not implemented. PORTD is mapped to cog register $1FF. (See "REGS" command) PORTD can only be used on cogs with the video function disabled. Example usage : Symmetrical mode PORTD + 'Enable PORTD function PORTD - 'Disable PORTD function PORTD IN 'Set PORTD direction to input PORTD OUT 'Set PORTD direction to output Example usage : Asymmetrical mode PORTD + 'Enable all cogs PORTD function PORTD - 'Disable all cogs PORTD function PORTD 3 + 'Enable PORTD function on cog 3 PORTD 2 6 + 'Enable PORTD function on cogs 2 to 6 PORTD IN 'Set PORTD direction to input PORTD OUT 'Set PORTD direction to output PortD input mode : +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1FF | PORTD | ram | +-------------------------------+ PortD output mode +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1FF | ram | PORTD | +-------------------------------+ See also VIEW,REGS ----------------------------------------------------------------------------------- ASYM Enable or disable asymmetrical cog mode. Asymmetrical mode allows cogs to be indivually configured. Each cog has individual options of video,ports and counters. To view the current mode use the command without a switch When changing from symmetrical mode to asymmetrical mode the current counter,video and portb settings are copied to all the asymmetrical cogs. Sample output : >asym Asymmetrical cog mode is enabled >asym - Asymmetrical cog mode is disabled >asym + Settings copied to asym cogs 8 cogs @ 133.333336 MHz & 48k Hub RAM Cog #0 has 2 x counters + video : PortB Cog #1 has 2 x counters + video : PortB Cog #2 has 2 x counters + video : PortB Cog #3 has 2 x counters + video : PortB Cog #4 has 2 x counters + video : PortB Cog #5 has 2 x counters + video : PortB Cog #6 has 2 x counters + video : PortB Cog #7 has 2 x counters + video : PortB Asymmetrical cog mode is enabled > See also VIEW command ----------------------------------------------------------------------------------- MHZ Show the current clock speed or shows closest PLL settings to nominated frequency. Sample output: >mhz PLL multipler = 16 PLL divider = 3 Clock frequency = 266.6667 MHz (133.3333 MHz) > >mhz 133 PLL settings for clock speeds within 10% of 133Mhz : * 24 / 5 = 120000000 * 5 / 1 = 125000000 * 10 / 2 = 125000000 * 15 / 3 = 125000000 * 20 / 4 = 125000000 * 21 / 4 = 131250000 * 16 / 3 = 133333333 * 11 / 2 = 137500000 * 22 / 4 = 137500000 * 17 / 3 = 141666666 * 23 / 4 = 143750000 > See also MUL,DIV ----------------------------------------------------------------------------------- MAP Show memory map of current configuration Sample output : >map +------------------------------+ $00000: | | | 48k Hub RAM | $0BFFF: | | +------------------------------+ $0C000: | | | !! 12k Not used !! | $0EFFF: | | +------------------------------+ $0F000: | | | 4k Spin/Booter ROM | | myrom.hex | $00FFF: | | +------------------------------+ > ----------------------------------------------------------------------------------- REGS Show the current register map. In asymmetrical mode requires a valid cog number. Sample output : Symmetrical mode >regs +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1F0 | PAR | ram | | 1F1 | CNT | ram | | 1F2 | INA | ram | | 1F3 | INB | ram | | 1F4 | ram | ram+OUTA | | 1F5 | ram | ram+OUTB | | 1F6 | ram | ram+DIRA | | 1F7 | ram | ram+DIRB | | 1F8 | ram | ram+CTRA | | 1F9 | ram | ram+CTRB | | 1FA | ram | ram+FRQA | | 1FB | ram | ram+FRQB | | 1FC | PHSA | ram+PHSA | | 1FD | PHSB | ram+PHSB | | 1FE | ram | ram+VCFG | | 1FF | ram | ram+VSCL | +-------------------------------+ > Sample output : Asymmetrical mode >regs 1 Register map for COG #1 +-------------------------------+ | Adr | read | write | +-------------------------------+ | 1F0 | PAR | ram | | 1F1 | CNT | ram | | 1F2 | INA | ram | | 1F3 | ram | ram | | 1F4 | ram | ram+OUTA | | 1F5 | ram | ram | | 1F6 | ram | ram+DIRA | | 1F7 | ram | ram | | 1F8 | ram | ram+CTRA | | 1F9 | ram | ram+CTRB | | 1FA | ram | ram+FRQA | | 1FB | ram | ram+FRQB | | 1FC | PHSA | ram+PHSA | | 1FD | PHSB | ram+PHSB | | 1FE | ram | PORTC | | 1FF | ram | ram | +-------------------------------+ > ----------------------------------------------------------------------------------- VIEW Shows the current configuration of all cogs. Counters,Ports and video distribution. Sample output : >view +---------------------------------------------------------------------+ | Cog #0 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #1 | 2 | ----- | ----- | PortC out | ----- --- | ----- | | Cog #2 | 2 | ----- | PortB | ----- --- | ----- --- | ----- | | Cog #3 | 2 | ----- | PortB | ----- --- | ----- --- | ----- | | Cog #4 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #5 | 2 | ----- | ----- | ----- --- | PortD in | ----- | | Cog #6 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #7 | 2 | Video | ----- | ----- --- | ----- --- | ----- | +---------------------------------------------------------------------+ > ----------------------------------------------------------------------------------- LOADTOYS Load collection of peripherals (toys) specific to a target board. Once loaded these toys can easily be attached using the "ADD" command. To view available files use with no parameter. >loadtoys Available files : *.toys cv de0_cv de2 max10 nano >loadtoys max10 "max10.toys" loaded Ok. AD5681 5P 12-BIT SPI DAC ADT7420 4P TEMPERATURE SENSOR ADXL362 6P SPI 3-AXIS ACCELEROMETER M25P16 4P SPI 16MBIT FLASH EEPROM BUTTON * 4 1P PUSHBOTTON LED * 8 1P GREEN LED J3 * 36 1P HEADER 40 PIN Toy filename : max10.toys > ----------------------------------------------------------------------------------- TOYS Show the available peripherals (toys) for the target board. The first column is the name of the toy and its type and the second column is the number of pins required in total. There are two types of toys. Single and multiple instance. Example of a single instance toy. LCD 13P LCD DISPLAY Example of a multiple instance toy PB * 4 1P PUSHBUTTONS Sample output : >toys AUDIO 6P EEPROM 2P GPIO * 36 1P HEX0 7P 7 SEGMENT DISPLAY HEX1 7P HEX2 7P HEX3 7P HEX4 7P HEX5 7P HEX6 7P HEX7 7P I2C 2P IR 1P INFRARED DETECTOR PB * 4 1P PUSHBUTTONS LCD 13P LCD DISPLAY LEDG * 9 1P GREEN LED LEDR * 18 1P RED LED PS2 2P PS2 CONNECTOR PS2.1 2P SD 7P SD CARD SW * 18 1P SWITCHES UART 4P > To get more information on a specific toy include its name as well. Sample output : >toys pb #1 PB KEY3 PIN_R24 #2 PB KEY2 PIN_N21 #3 PB KEY1 PIN_M21 #4 PB KEY0 PIN_M23 > See ADD,REMOVE,PINS,FPGA,SIGNALS ----------------------------------------------------------------------------------- ORDER Show all pins in order they appear in the current loaded toy file. Sample output : Partial >order - AD5681 LDAC PIN_N18 - AD5681 RST PIN_L15 - AD5681 SCL PIN_G17 - AD5681 SDA PIN_H17 - AD5681 SYNC PIN_N19 - ADT7420 CT PIN_P13 - ADT7420 INT PIN_AB14 - ADT7420 SCL.1 PIN_W13 - ADT7420 SDA.1 PIN_R13 - ADXL362 CS PIN_L14 - ADXL362 INT1 PIN_M15 - ADXL362 INT2 PIN_M14 - ADXL362 MISO PIN_L18 - ADXL362 MOSI PIN_L19 - ADXL362 SCLK PIN_M18 - M25P16 CS.1 PIN_R10 - M25P16 CLK PIN_P11 - M25P16 ASDI PIN_R11 - M25P16 DATA PIN_P10 - BUTTON PB1 PIN_M1 - BUTTON PB2 PIN_R1 - BUTTON PB3 PIN_V5 - BUTTON PB4 PIN_AB5 > See also FPGA,PINS,SIGNALS commands ----------------------------------------------------------------------------------- PINS List all assigned pins in order of port name and bit number. Example Usage : PINS 'List all assigned pins PINS pb 'List all pins assigned to PortB only Sample output : >pins Pa4 LCD LCD_BLON PIN_L6 Pa5 LCD LCD_DATA0 PIN_L3 Pa6 LCD LCD_DATA1 PIN_L1 Pa7 LCD LCD_DATA2 PIN_L2 Pa8 LCD LCD_DATA3 PIN_K7 Pa9 LCD LCD_DATA4 PIN_K1 Pa10 LCD LCD_DATA5 PIN_K2 Pa11 LCD LCD_DATA6 PIN_M3 Pa12 LCD LCD_DATA7 PIN_M5 Pa13 LCD LCD_EN PIN_L4 Pa14 LCD LCD_ON PIN_L5 Pa15 LCD LCD_RS PIN_M2 Pa16 LCD LCD_RW PIN_M1 > ----------------------------------------------------------------------------------- FPGA Show all pins sorted by FPGA name Example usage : fpga 'List all pins fpga ab 'Show FPGA pins containing AB in its number Sample output : >fpga ab - SD SD_DAT2 PIN_AB14 - HEX6 HEX64 PIN_AB15 - HEX6 HEX61 PIN_AB16 - HEX6 HEX63 PIN_AB17 - HEX5 HEX52 PIN_AB18 - HEX4 HEX40 PIN_AB19 Pb23 HEX3 HEX32 PIN_AB20 - GPIO GPIO02 PIN_AB21 - GPIO GPIO00 PIN_AB22 Pd12 SW SW12 PIN_AB23 Pd11 SW SW11 PIN_AB24 Pd9 SW SW09 PIN_AB25 Pd7 SW SW07 PIN_AB26 Pd4 SW SW04 PIN_AB27 Pd0 SW SW00 PIN_AB28 > ----------------------------------------------------------------------------------- SIGNALS List pins sorted by signal name Example usage : signals 'List all signals by signal name signals lcd 'List signals containing "lcd" in it's name Sample output : >signals sd - EEPROM EEP_I2C_SDAT PIN_E14 - I2C I2C_SDAT PIN_A8 Pa6 SD SD_CLK PIN_AE13 Pa7 SD SD_CMD PIN_AD14 Pa8 SD SD_DAT0 PIN_AE14 Pa9 SD SD_DAT1 PIN_AF13 Pa10 SD SD_DAT2 PIN_AB14 Pa11 SD SD_DAT3 PIN_AC14 Pa12 SD SD_WP_N PIN_AF14 > ----------------------------------------------------------------------------------- LOGO Restores the "Parallax" name and copyright info to rom. Sample output : >logo FF00: 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D ================ FF10: 20 43 6F 70 79 72 69 67 68 74 20 32 30 31 35 20 Copyright 2015 FF20: 20 50 61 72 61 6C 6C 61 78 2C 20 49 6E 63 2E 20 Parallax, Inc. FF30: 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D 2D ---------------- FF40: 77 77 77 2E 70 61 72 61 6C 6C 61 78 2E 63 6F 6D www.parallax.com FF50: 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D 3D ================ FF60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ > ----------------------------------------------------------------------------------- ADD Add a peripheral (toy) to the project Example usage : add lcd 'Add toy to project starting @ first available pin add lcd pa8 'Add toy starting @ pb8 add lcd pb? 'Add toy to project starting @ first available PortB pin add sw 'Add first avialble SW to first available pin add sw pa? 3 'Add 3 * SW starting @ first available PortA pin add sw * 'Add all remaining SW starting @ first available pin add sw 6 'Add 6 * SW starting @ first available pin add sw3 pb12 'Add SW3 to PORTB bit 12 Sample output : >add lcd pa4 Pa4 LCD LCD_BLON PIN_L6 Pa5 LCD LCD_DATA0 PIN_L3 Pa6 LCD LCD_DATA1 PIN_L1 Pa7 LCD LCD_DATA2 PIN_L2 Pa8 LCD LCD_DATA3 PIN_K7 Pa9 LCD LCD_DATA4 PIN_K1 Pa10 LCD LCD_DATA5 PIN_K2 Pa11 LCD LCD_DATA6 PIN_M3 Pa12 LCD LCD_DATA7 PIN_M5 Pa13 LCD LCD_EN PIN_L4 Pa14 LCD LCD_ON PIN_L5 Pa15 LCD LCD_RS PIN_M2 Pa16 LCD LCD_RW PIN_M1 > Single items of a multiple instance toy can be added using the following Sample output : >add key2 pa7 Pa7 PB KEY2 PIN_N21 > See also TOYS,REMOVE,FLIP,SHUFFLE,SWAP,SAVEPINS See also ".toys" file format ----------------------------------------------------------------------------------- REMOVE Remove pin(s) from current pin allocations remove pa7 'Remove PortA bit 7 assignments remove pa0 pa5 'Remove PortA bit 0 to PortA bit 5 remove lcd 'Remove all pin assignments associated to "LCD" remove key2 'Remove pin assignment attached to "KEY7" remove * 'Remove all pin assignments Sample output : >remove pa3 1 pins removed >remove pa6 pa8 3 pins removed >remove lcd_en 1 pins removed >remove * Remove ALL pins (y or n)? y 70 pins removed >remove lcd 13 pins removed See also ADD,FLIP,SWAP,SHUFFLE,SAVEPINS ----------------------------------------------------------------------------------- FLIP Flip pin sequence Useful for reversing the order of pin assignments. Sample output : >pins pa Pa0 LCD LCD_BLON PIN_L6 Pa1 LCD LCD_DATA0 PIN_L3 Pa2 LCD LCD_DATA1 PIN_L1 Pa3 LCD LCD_DATA2 PIN_L2 Pa4 LCD LCD_DATA3 PIN_K7 Pa5 LCD LCD_DATA4 PIN_K1 Pa6 LCD LCD_DATA5 PIN_K2 Pa7 LCD LCD_DATA6 PIN_M3 Pa8 LCD LCD_DATA7 PIN_M5 Pa9 LCD LCD_EN PIN_L4 Pa10 LCD LCD_ON PIN_L5 Pa11 LCD LCD_RS PIN_M2 Pa12 LCD LCD_RW PIN_M1 >flip pa1 pa8 Pa1 LCD LCD_DATA7 PIN_M5 Pa2 LCD LCD_DATA6 PIN_M3 Pa3 LCD LCD_DATA5 PIN_K2 Pa4 LCD LCD_DATA4 PIN_K1 Pa5 LCD LCD_DATA3 PIN_K7 Pa6 LCD LCD_DATA2 PIN_L2 Pa7 LCD LCD_DATA1 PIN_L1 Pa8 LCD LCD_DATA0 PIN_L3 > See also ADD,REMOVE,SWAP,SHUFFLE,SAVEPINS ----------------------------------------------------------------------------------- SWAP Swap two pin assignments Sample output : >pins pa Pa0 SD SD_CLK PIN_AE13 Pa1 SD SD_CMD PIN_AD14 Pa2 SD SD_DAT0 PIN_AE14 Pa3 SD SD_DAT1 PIN_AF13 Pa4 SD SD_DAT2 PIN_AB14 Pa5 SD SD_DAT3 PIN_AC14 Pa6 SD SD_WP_N PIN_AF14 >swap pa0 pa3 Pa3 SD SD_CLK PIN_AE13 Pa0 SD SD_DAT1 PIN_AF13 > See also ADD,REMOVE,SHUFFLE,FLIP,SAVEPINS ----------------------------------------------------------------------------------- SHUFFLE Shuffle pin assignments associated to selected "toy" Use a positive value to shuffle items "UP" and negative values to shuffle items "DOWN". Sample output : >pins pa Pa0 SD SD_CLK PIN_AE13 Pa1 SD SD_CMD PIN_AD14 Pa2 SD SD_DAT0 PIN_AE14 Pa3 SD SD_DAT1 PIN_AF13 Pa4 SD SD_DAT2 PIN_AB14 Pa5 SD SD_DAT3 PIN_AC14 Pa6 SD SD_WP_N PIN_AF14 >shuffle sd 2 7 items shuffled 2 pin positions >pins pa Pa0 SD SD_DAT0 PIN_AE14 Pa1 SD SD_DAT1 PIN_AF13 Pa2 SD SD_DAT2 PIN_AB14 Pa3 SD SD_DAT3 PIN_AC14 Pa4 SD SD_WP_N PIN_AF14 Pa5 SD SD_CLK PIN_AE13 Pa6 SD SD_CMD PIN_AD14 > See also ADD,REMOVE,FLIP,SWAP,SAVEPINS ----------------------------------------------------------------------------------- COMPACT Compact pin assignments for no gaps in sequence Sample output : >pins Pa3 SW SW00 PIN_AB28 Pa8 SW SW01 PIN_AC28 Pa20 SW SW02 PIN_AC27 >compact Pa3 changed to Pa0 Pa8 changed to Pa1 Pa20 changed to Pa2 3 pins changed >pins Pa0 SW SW00 PIN_AB28 Pa1 SW SW01 PIN_AC28 Pa2 SW SW02 PIN_AC27 > See also ADD,REMOVE,FLIP,SWAP,SHUFFLE ----------------------------------------------------------------------------------- LOADQSF Load pin assignments from .qsf file To view available file use with no parameter Sample output : >loadqsf Available files : *.qsf cv de2 max10 nano >loadqsf de2 32 I/O pins connected. 8 cog leds connected. > See also PINS command ----------------------------------------------------------------------------------- COG Override cog.v file for specific cog(s) Valid in asummetrical mode only Example usage : >cog 2 4 zzz 'cog #2 to cog #4 override with zzz.v > cog - 'Clears all override filenames >cog 3 - 'Clers cog #3 override Sample output : Overriding cog #5 >view +---------------------------------------------------------------------+ | Cog #0 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #1 | 2 | ----- | ----- | PortC out | ----- --- | ----- | | Cog #2 | 2 | ----- | PortB | ----- --- | ----- --- | ----- | | Cog #3 | 2 | ----- | PortB | ----- --- | ----- --- | ----- | | Cog #4 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #5 | 2 | ----- | ----- | ----- --- | PortD in | ----- | | Cog #6 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #7 | 2 | Video | ----- | ----- --- | ----- --- | ----- | +---------------------------------------------------------------------+ >cog 5 exp1 Cog #5 = exp1.v >view +---------------------------------------------------------------------+ | Cog #0 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #1 | 2 | ----- | ----- | PortC out | ----- --- | ----- | | Cog #2 | 2 | ----- | PortB | ----- --- | ----- --- | ----- | | Cog #3 | 2 | ----- | PortB | ----- --- | ----- --- | ----- | | Cog #4 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #5 | (exp1.v) | | Cog #6 | 2 | ----- | ----- | ----- --- | ----- --- | ----- | | Cog #7 | 2 | Video | ----- | ----- --- | ----- --- | ----- | +---------------------------------------------------------------------+ > See also VIEW,CTR,VIDEO,PORTB,PORTC,PORTD,ALU ----------------------------------------------------------------------------------- ALU *** Not implemented yet **** Ovverides cog_alu.v for specofic cog(s) Valid in asymmetrical mode only See also VIEW,CTR,VIDEO,PORTB,PORTC,PORTD,COG ----------------------------------------------------------------------------------- STATS Show current stats of assigned pins/ports Sample output : >stats Total Free pins = 70 PortA usage = 4 PortB usage = 28 PortC usage = 8 PortD usage = 18 First available pin = Pa0 > See also PINS,FPGA,SIGNALS ----------------------------------------------------------------------------------- SAVEPINS Save the pin assignments. Pins will be saved in a .pins file using the project name Sample output : >savepins c:\p1_fpga\jjj\jjj.pins saved OK Pin filename : jjj.pins > Make sure to do this operation before a "SAVE" command See also SAVE ----------------------------------------------------------------------------------- ZTAB Zero's out sin,log tables in high rom Addresses $c000 to $efff (12k) ----------------------------------------------------------------------------------- LEDS Used to invert cog leds if used. BeMicro CV and Max10 boards have inverted leds (active low) Use thus command with no switch to view current status. Automatically enabled when "target" command selects BeMicro boards. Sample output : >leds Invert Cog LEDS is disabled >leds + Invert Cog LEDS is enabled >leds - Invert Cog LEDS is disabled > See also INFO command. ----------------------------------------------------------------------------------- SAVEHEX Save a range of hub image as a .hex file Requires a filename and a start and end address. Sample output : >savehex myrom c000 ffff c:\p1_fpga\jjj\myrom.hex saved in 16384 bytes. > ----------------------------------------------------------------------------------- COMPHEX Compares a hex file to the current project hub image or compares two hex files against each other. An asterisk (*) adds more detail to the results You will be propmted to 'Enter filename'. If no filename is entered the results will be displayed on the console. (Can be large!). If a filename is supplied a file will be created in the current project folder. The filename will automatically be appended with a ",txt" extension. Example uasge : >comphex 1 myrom c000 compares one file "myrom.hex" to the image starting @ address c000 >comphex 2 myrom test Compares two files "myrom.hex" and "test.hex" >comphex 2 myrom test * Same as above with more detailed report. Sample output : Partial F6C0: ................................................................ F700: ................................................................ F740: ................................................................ F780: ....................................XX.XX....XXXXXXXXXXXXX.XXXXX F7C0: XXX.XXXXXX.XXXX.XXXXXXXXXXXXXXXXXX.XXXXXXX.XXXXXXX.X.X..XXXXXXXX F800: ................................................................ F840: ................................................................ F880: ................................................................ A 'X' indicates the mismatch between the data The address is the hub address of byte offset address of the files Sample output : Partial F000: 02 <> 0 F001: CA <> BC F7A4: 68 <> 0 F7A5: FC <> 0 F7A7: 10 <> 0 F7A8: 80 <> 0 If the asterisk '*' option is used additional detail is included. The first column is the byte offset or address of the data byte The second column is the data byte from the first file The third column is the data byte from the second file or the project image ----------------------------------------------------------------------------------- HEX List all .hex files in the current project folder. Sample output : >hex Available files : *.hex in c:\p1_fpga\jjj c:\p1_fpga\jjj\char_rom.hex c:\p1_fpga\jjj\hub_rom_low.hex c:\p1_fpga\jjj\myrom.hex c:\p1_fpga\jjj\oz.hex c:\p1_fpga\jjj\zzz.hex > -----------------------------------------------------------------------------------