// Segment is SQIRam.c
// Last Revision On 13 Jun 2019
// Functions Permit Reading/Writing to SPI/SQI RAM Chip



void SetRamSig(void)
{
 set_direction(RAMCS,1);            // Set RAMCS As Output
 set_direction(SCLK,1);           // Set SCLK As Output
}

void ClockStrobe(void)
{
 high(SCLK);
 low(SCLK);
}

void SQIAddress(unsigned long Address)
{
 union Common Location;
 Location.Long.L0=Address;
 set_outputs(D3,D0,Location.Nibble.N5);       // Output Address 23 To 20;
 ClockStrobe();                               // Latch Address 23 To 20;
 set_outputs(D3,D0,Location.Nibble.N4);       // Output Address 19 To 16
 ClockStrobe();                               // Latch Address 19 To 16
 set_outputs(D3,D0,Location.Nibble.N3);       // Output Address 15 To 12
 ClockStrobe();                               // Latch Address 15 To 12
 set_outputs(D3,D0,Location.Nibble.N2);       // Output Address 11 To 8
 ClockStrobe();                               // Latch Address 11 To 8
 set_outputs(D3,D0,Location.Nibble.N1);       // Output Address 7 To 4
 ClockStrobe();                               // Latchh Address 7 To 4
 set_outputs(D3,D0,Location.Nibble.N0);       // Output Address 3 To 0
 ClockStrobe();                               // Latch Address 3 to 0
}

void SPI2SQI(void)                  // Force RAM Into SQI Mode 0x38
{
 set_direction(D0,1);               // Set D0 As Output;
 low(SCLK);                       // Set CLK Low 
 low(RAMCS);                        // Enable RAM Chip
 low(D0);                           // Set Data Output Low
 ClockStrobe();                     // Latch Bit7=0
 ClockStrobe();                     // Latch Bit6=0
 high(D0);                          // Set Data Output High
 ClockStrobe();                     // Latch Bit5=1
 ClockStrobe();                     // Latch Bit4=1
 ClockStrobe();                     // Latch Bit3=1
 low(D0);                           // Set Data Output Low
 ClockStrobe();                     // Latch Bit2=0
 ClockStrobe();                     // Latch Bit1=0;
 ClockStrobe();                     // Latch Bit0=0;
 set_direction(D0,0);               // Set D0 As Input
 high(RAMCS);                       // Disable RAM Chip
}

char SQIByteRead(unsigned long Address)
{
 union Common Data;
 set_directions(D3,D0,0b1111);                   // Set D3,D2,D1,D0 As Outputs
 low(SCLK);                                    // Set SCLK Low 
 low(RAMCS);                                     // Enable RAM Chip
 set_outputs(D3,D0,0b0000);                      // Output Upper Nibble Command
 ClockStrobe();                                  // Latch Upper Nibble Command
 set_outputs(D3,D0,0b0011);                      // Output Lower Nibble Command
 ClockStrobe();                                  // Latch Lower Nibble Command
 SQIAddress(Address);                            // Strobe Out The Address
 set_directions(D3,D0,0b0000);                   // Set D3,D2,D1,D0 As Inputs
 ClockStrobe();                                  // First Dead Cycle
 ClockStrobe();                                  // Second Dead Cycle
 Data.Nibble.N1=get_states(D3,D0);               // Grab Upper Nibble From SRAM
 ClockStrobe();                                  // Ack Upper Nibble
 Data.Nibble.N0=get_states(D3,D0);               // Grab Lower Nibble From SRAM
 ClockStrobe();                                  // Ack Lower Nibble
 high(RAMCS);                                    // Disable RAM Chip
 return(Data.Byte.B0);                           // Return Byte
}

void SQIByteWrite(char Byte,unsigned long Address)
{
 union Common Data;
 Data.Byte.B0=Byte;
 set_directions(D3,D0,0b1111);                   // Set D3,D2,D1,D0 As Outputs
 low(SCLK);                                    // Set SCLK Low
 low(RAMCS);                                     // Enable RAM Chip
 set_outputs(D3,D0,0b0000);                      // Output Upper Nibble Command
 ClockStrobe();                                  // Latch Upper Nibble Command
 set_outputs(D3,D0,0b0010);                      // Output Lower Nibble Command
 ClockStrobe();                                  // Latch Lower Nibble Command
 SQIAddress(Address);                            // Strobe Out The Address
 set_outputs(D3,D0,Data.Nibble.N1);              // Output Data Upper Nibble
 ClockStrobe();                                  // Latch The Data Upper Nibble
 set_outputs(D3,D0,Data.Nibble.N0);              // Output Data Lower Nibble
 ClockStrobe();                                  // Latch The Data Lower Nibble
 set_directions(D3,D0,0b0000);                   // Set D3,D2,D1,D0 As Inputs
 high(RAMCS);                                    // Disable RAM Chip
}

char RamByteRead(unsigned long Address)
{
 SetRamSig();
 if(Mode == SPI) SPI2SQI();
 return(SQIByteRead(Address));
}

void RamByteWrite(char Byte,unsigned long Address)
{
 SetRamSig();
 if(Mode == SPI) SPI2SQI();
 SQIByteWrite(Byte,Address);
}