
% Propeller Delta-Sigma ADC Simulation
%
% SaucySoliton 2018-12-19
%


Vi=0;
Ri=150e3;
Vc=1.65;
Rf=100e3;
C=2e-9;
Fs=80e6;

Vh=3.3/Rf*Ri -1.65/2
Vl= -1.65/2

samples=8000;
Vcl=zeros(samples,1);
Vfl=zeros(samples,1);
Vil=zeros(samples,1);
Dl=zeros(samples,1);
for n=1:samples
	if mod(n,1000)==0
		Vi=Vi+3.3/256  % DAC 8 bit step
		%Vi=Vi+4.95/255 % input 8bit step 
	end
	if( Vc > 1.65 )
		Vf=0.0;
		Dl(n)=1;
	else
		Vf=3.3;
		Dl(n)=0;
	end
   
	Vc=Vc+ (((Vi-Vc)/Ri) + ((Vf-Vc)/Rf))/C/Fs;
	Vcl(n)=Vc;
	Vil(n)=Vi;
	Vfl(n)=(1.65-Vf)*Ri/Rf + 1.65 ;
%	Vfl(n)=Vf;
end
%plot(Vcl)
Drec=conv(Dl,ones(64,1)/64,'valid');
Arec=Drec*(Vh-Vl) + Vl ;
plot( Arec )
hold on
testfilter=cmafilter(8,10,51);
testscale= floor(sum(testfilter)/255) 
Dtest=conv(Dl,testfilter,'valid');
Qtest=floor( Dtest/testscale )/255 ;
%Qtest=( Dtest/testscale )/255 ;
Atest=Qtest*(Vh-Vl) + Vl ;

plot( Atest )
plot(Vil,'LineWidth',2)
legend('Rectangle64','CMA(8,10,51)','Actual Voltage')
hold off

