TACHYON { ADC_SD.fth } pri ADC_SD.fth ." Extensions to TACHYON by MJB - 121021.1300 " ; " !!!!!!!!!!!!!!!!!!!!! REQUIRES LATEST KERNEL V2.0 121012.2200 upwards !!!!!!!!!!!!!" DROP IFNDEF LEMIT : LEMIT DUP $0A <> IF $100 OR 2* (EMIT) ELSE DROP THEN ; \ Define these two symbols as dummy definitions so that Forth will do nothing except affect echo - they are meant for HS-SerialRxL \ start of load symbol - Intercepted by HS-SerialRxL and will automatically strip comments etc IFNDEF [~ : [~ 1 flags CLR ' LEMIT uemit W! ; \ end of load symbol - Intercepted by HS-SerialRxL will revert back to transparent mode IFNDEF ]~ : ]~ 1 flags SET 0 uemit W! ; [~ \ If HS-SerialRxL is used then it will already be filtering out all comments and redundancies because it just saw [~ { ******************* TACHYON FORTH EXTENSIONS by MJB Dr. Markus Baer ********************* ** Sigma-Delta ADC module (with ASM module) LOADSTATS: CHANGELOG: 121021 - ADCSD Sigma-Delta single shot with ASM module (cyclic reading is on hold for later) 121019 - initial with ADCSD Sigma-Delta ADC module } HEX : TestADCSD ( ) 1 ADCSD_Stop ! \ stop after first measurement \ ADCSD_INIT ( ResultHubAddr StopHubAddress nBits SDInputPin SDFeedbackPin ) ADCSD_Result ADCSD_Stop 8 \ n-Bits 20 \ PBoE SDInputPin Microphone 21 \ PBoE SDFeedbackPin ADCSD_INIT ; { $1E0 10 COGDUMP [ADCSD] $1E0 10 COGDUMP $1E0 10 COGDUMP 01E0: F8BF47A2 A0BF9FFC A0BFA3CF 84BFA3D0 01E4: A0BFA1CF 083FA3A8 02BF4FD2 5C6801E0 01E8: 5C7C0007 867D125B A0E90401 867D125D 01EC: A0E90400 EC7D0425 867D1009 A0E91020 ok \ test code LONG ADCSD_Result BYTE ADCSD_Stop $1E0 10 COGDUMP \ dump Module [ADCSD] $1E0 10 COGDUMP \ dump Module SPRS #8 \ n-Bits #20 \ PBoE SDInputPin Microphone #21 \ PBoE SDFeedbackPin DUP MASK OUTPUTS \ make SDF pin an output \ SPRS \ ok bis hier 9 SHL \ shift SDFeedbackPin to destination OR \ or together with SDInputPin on source %01001 #26 SHL \ shift countermode 9 = POS detector with feedback to position OR CTRA COG! \ or in as well and store to CTRA of this COG 1 FRQA COG! 1 SWAP SHL 1- \ from bitCount for number of bits resolution \ \ the corresponding pattern for deltaR / counter delay is created \ \ $FFFF for 16-bit, $FFF for 12-bit, or $FF for 8-bit) DELTA \ store delta to waitcnt ADCSD_Stop 4 COGREG COG! \ StopHubAddress to REG4 4 COGREG COG@ . \ ' now ResultHubAddr is left at TOS \ RUNMOD ; \ \ TABLE ADCSD_ASM \ "H" | "e" | 68 | 69 | 70 | 0 | : TestADCSD ( ) 1 ADCSD_Stop C! \ stop after first measurement ADCSD_Stop C@ . \ ADCSD_INIT ( ResultHubAddr StopHubAddress nBits SDInputPin SDFeedbackPin ) ADCSD_Result ADCSD_Stop 8 \ n-Bits 20 \ PBoE SDInputPin Microphone 21 \ PBoE SDFeedbackPin ADCSD_INIT \ Dump the cog's SPRs with labels SPRS $1E0 10 COGDUMP ' dump Module and SPRS .S ADCSD_Result .S RUNMOD $FFFF DELTA ADCSD_Result DUP RUNMOD @ . ; \ end test code IFNDEF PWM! \ New kernel module method to speed-up updates = 233us total pub PWM! ( duty8 channel -- ) MASK pwmtbl W@ [PWM!] RUNMOD ; } \ two channel { ' ADCSDsingle shot double channel PASM Module by Markus Baer aka MJB org _RUNMOD _ADCSDsingleD mov X,#1 shl X,tos ' number of bits resolution on TOS sub X,#1 ' create bit pattern with X bits set mov target,cnt 'Get the current counter value. add target,#16 'Add a little to get ahead. waitcnt target,X 'Sync to clock; add interval to time. neg tos,phsa 'Negate phsa into result. neg tos+1,phsb 'Negate phsa into result. waitcnt target,#0 'Wait for interval to pass. add tos,phsa 'Add phsa into result. and return on TOS add tos+1,phsb 'Add phsb into result. and return on TOS+1 jmp #doNEXT } \ prepare everything { ' ADCSDsingle PASM Module by Markus Baer aka MJB based on Parallax examples org _RUNMOD _ADCSDsingle mov X,#1 shl X,tos ' number of bits resolution on TOS sub X,#1 ' create bit pattern with X bits set mov target,cnt 'Get the current counter value. add target,#16 'Add a little to get ahead. waitcnt target,X 'Sync to clock; add interval to time. neg tos,phsa 'Negate phsa into result. waitcnt target,#0 'Wait for interval to pass. add tos,phsa 'Add phsa into result. and return on TOS jmp #doNEXT } TABLE ADCSDsASM \ precompiled codes here - so can be just loaded as fth file $01 | $4E | $FF | $A0 | $A8 | $4F | $BF | $2C | $01 | $4E | $FF | $84 | $F1 | $47 | $BF | $A0 | $10 | $46 | $FF | $80 | $A7 | $47 | $BF | $F8 | $FC | $51 | $BF | $A4 | $00 | $46 | $FF | $F8 | $FC | $51 | $BF | $80 | $00 | $01 | $7C | $5C | : [ADCSDs] ADCSDsASM 10 LOADMOD ; : INIT_ADC_SD ( -- ) \ for PropBoE [ADCSDs] \ load the single shot ADC sigma delta module into COG - raw no scaling done \ setup for PropBoE #20 \ PBoE SDInputPin Microphone #21 \ PBoE SDFeedbackPin DUP MASK OUTPUTS \ make SDF pin an output 9 SHL \ shift SDFeedbackPin to destination OR \ or together with SDInputPin on source %01001 #26 SHL \ shift countermode 9 = POS detector with feedback to position OR CTRA COG! \ or in as well and store to CTRA of this COG 1 FRQA COG! \ load counter FRQ register ; \ setup complete : RUN_ADC_SD ( nBitsResolution -- result ) RUNMOD ; \ NEWCNT 100 FOR 8 RUNMOD .DEC CR NEXT .LAP \ 112 ms \ NEWCNT 100 FOR 12d RUNMOD .DEC CR NEXT .LAP \ 992 ms \ NEWCNT 100 FOR 16d RUNMOD .DEC CR NEXT .LAP \ 341,875us