The Propeller contains eight (8) processors, called cogs, numbered 0 to 7. Each cog contains the same components (See the Block Diagram): a Processor block, local 2 KB RAM configured as 512 longs (512 x 32 bits), two Counter Modules with PLLs, a Video Generator, I/O Output Register, I/O Direction Register, and other registers not shown in the table below. Each cog is designed exactly the same and can run tasks independently from the others.
All eight cogs are driven from the same clock source, the System Clock, so they each maintain the same time reference and all active cogs execute instructions simultaneously. They also all have access to the same Shared Resources, like I/O Pins, Main RAM, and the System Counter.
Cogs can be started and stopped at run time and can be programmed to perform tasks simultaneously, either independently or with coordination from other cogs through Main RAM. Regardless of the nature of their use, the Propeller application designer has full control over how and when each cog is employed; there is no compiler-driven or operating system-driven splitting of tasks between multiple cogs. This empowers the developer to deliver absolutely deterministic timing, power consumption, and response to the embedded application.
Each cog has its own RAM, called Cog RAM, which contains 512 registers of 32 bits each. The Cog RAM is all general purpose RAM except for the last 16 registers, which are special purpose registers. The Cog RAM is used for executable code, data, variables, and the last 16 locations serve as interfaces to the System Counter, I/O pins, and local cog peripherals. Cog RAM is long-addressable only.
When a cog is booted up, locations 0 ($000) through 495 ($1EF) are loaded sequentially from Main RAM / ROM and its special purpose locations, 496 ($1F0) through 511 ($1FF) are cleared to zero. After loading, the cog begins executing instructions, starting at location 0 of Cog RAM. It will continue to execute code until it is stopped or rebooted by either itself or another cog, or a reset occurs.
Each Special Purpose Register may be accessed via:
The following are examples in Propeller Assembly:
MOV $1F4, #$FF 'Set OUTA 7:0 high MOV OUTA, #$FF 'Same as above
The following are examples in Spin:
SPR[$4] := $FF 'Set OUTA 7:0 high OUTA := $FF 'Same as above
Cog RAM Special Purpose Registers | ||||
---|---|---|---|---|
Address |
Name |
Type |
Description |
|
|
$1F0 |
|||
$1F1 |
Read-Only1 |
|||
$1F2 |
Read-Only1 |
|||
$1F3 |
INB 3 |
Read-Only1 |
Input States for P63–P32 |
|
$1F4 |
Read/Write |
|||
$1F5 |
OUTB 3 |
Read/Write |
Output States for P63–P32 |
|
$1F6 |
Read/Write |
|||
$1F7 |
DIRB 3 |
Read/Write |
Direction States for P63–P32 |
|
$1F8 |
Read/Write |
|||
$1F9 |
CTRB |
Read/Write |
Counter B Control |
|
$1FA |
Read/Write |
|||
$1FB |
FRQB |
Read/Write |
Counter B Frequency |
|
$1FC |
Read/Write2 |
|||
$1FD |
PHSB |
Read/Write2 |
Counter B Phase |
|
$1FE |
Read/Write |
Video Configuration |
||
$1FF |
Read/Write |
|||
|
Propeller Help Version 1.1
Copyright © Parallax Inc.
5/13/2009