The CLK register is the System Clock configuration control; it determines the source of and the characteristics for the System Clock. More precisely, the CLK register configures the RC Oscillator, Clock PLL, Crystal Oscillator, and Clock Selector circuits. It is configured at compile time by the _CLKMODE constant and is writable at run time through the CLKSET Spin command or the CLKSET assembly instruction. Whenever the CLK register is written, a global delay of ≈75 µs occurs as the clock source transitions.
Whenever this register is changed, a copy of the value written should be placed in the Clock Mode value location (which is BYTE[4] in Main RAM) and the resulting master clock frequency should be written to the Clock Frequency value location (which is LONG[0] in Main RAM) so that objects which reference this data will have current information for their timing calculations. When possible, it is recommended to use Spin’s CLKSET command since it automatically updates all the above-mentioned locations with the proper information.
Only certain bit patterns in the CLK register are valid clock modes. See Valid Clock Mode Expressions for more information. The Clock object in the Propeller Library may also be useful since it provides clock modification and timing methods.
Propeller Help Version 1.1
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5/13/2009