'Segment Is CUSTOM_XMM.INC 'Dual SRAM Memory Driver For Prop1 'Last Revision On 26Jun23 '=============================================================================== { ' The XMM functions included are controlled via Catalina symbols defined ' internally as required within various Catalina files: ' ' CACHED : defined if CACHE in use (any size) ' ' NEED_FLASH : defined if FLASH support required ' ' NEED_XMM_READLONG : defined if XMM_ReadLong (and XMM_ReadMult) required ' ' NEED_XMM_WRITELONG : defined if XMM_WriteLong (and XMM_WriteMult) required ' ' NEED_XMM_READPAGE : defined if XMM_ReadPage required ' ' NEED_XMM_WRITEPAGE : defined if XMM_WritePage required } '=============================== CACHE CHECK =================================== ' ' If this platform does not need the cache enabled, delete the following: ' '#ifndef CACHED '#error : PLATFORM REQUIRES CACHE OPTION (CACHED_1K .. CACHED_8K or CACHED) '#endif ' '====================================== FLASH CHECK ========================================== ' ' If this platform has FLASH RAM, delete the following: ' '#ifdef NEED_FLASH '#error : FLASH NOT SUPPORTED ON THIS PLATFORM '#endif ' '=============================CONSTANTS FOR THIS CONFIGURATION================================ CON Ram_CS_Pin = 27 Ram_CLK_Pin = 26 Ram_D7_Pin = 25 'SRAM2 D3 --> HOLD Ram_D6_Pin = 24 'SRAM2 D2 --> DNU Ram_D5_Pin = 23 'SRAM2 D1 --> SO Ram_D4_Pin = 22 'SRAM2 D0 --> SI Ram_D3_Pin = 21 'SRAM1 D3 --> HOLD Ram_D2_Pin = 20 'SRAM1 D2 --> DNU Ram_D1_Pin = 19 'SRAM1 D1 --> SO Ram_D0_Pin = 18 'SRAM1 D0 --> SI Ram_CLK = (|< Ram_CLK_Pin) Ram_CS = (|< Ram_CS_Pin) Ram_HOLD = (|< Ram_D7_Pin) | (|< Ram_D3_Pin) Ram_DNU = (|< Ram_D6_Pin) | (|< Ram_D2_Pin) Ram_SO = (|< Ram_D5_Pin) | (|< Ram_D1_Pin) Ram_SI = (|< Ram_D4_Pin) | (|< Ram_D0_Pin) Ram_Bus = Ram_HOLD | Ram_DNU | Ram_SO | Ram_SI Ram_CS_CLK_SI = Ram_CS | Ram_CLK | Ram_SI Ram_Init_Sig = Ram_CLK | Ram_CS | Ram_SI | Ram_HOLD Ram_Cs_Clk_Bus = Ram_CS | Ram_CLK | Ram_Bus ReadCmd = 3 WriteCmd = 2 DAT '====================================== MINIMAL API FUNCTIONS ===================================== '---------------------------------------XMM_ACTIVATE FUNCTION-------------------------------------- XMM_Activate or dira,RamInitSig 'Outputs: RamCS,RamCLK,RamSI,RamHOLD or outa,RamCsClkBus 'RamCS=H mov RamLoop,#08 'RamLoop=0x08 mov RamData,#$1C 'RamData=0x1c (mirror or 0x38) :QuadModeLoop andn outa,RamCsClkSi 'RamCS=L,RamCLK=L,RamSI=L mov RamCopy,#01 'RamCopy=0x01 and RamCopy,RamData 'RamCopy=RamCopy & RamData tjz RamCopy,#:QuadModeClk 'if(RamCopy == 0x00) goto QuadModeClk or outa,RamBus 'if(carry) RamBus=H :QuadModeClk or outa,RamCLK 'RamCLK=H shr RamData,#01 'RamData=RamData >> 0x01 djnz RamLoop,#:QuadModeLoop 'if(--RamLoop) goto MakeQuadModeLoop andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=L or dira,RamCsClkBus 'OutPuts: RamCS,RamCLK,RamBus (full) or outa,RamCS 'RamCS=H XMM_Activate_ret ret '-----------------------------------------XMM_TRISTATE FUNCTION------------------------------------ XMM_TriState andn dira,RamCsClkBus 'InPuts: RamCS,RamCLK,RamBus XMM_TriState_ret ret 'Return '----------------------------Send Read Or Write Memory Request To SRAM----------------------------- SendReadReq mov RamData,#ReadCmd 'RamData=0x03 jmp #LoadReadWrite 'Goto LoadReadWrite SendWriteReq mov RamData,#WriteCmd 'RamData=0x02 LoadReadWrite shl RamData,#24 'RamData=RamData << 24 and XMM_Addr,RamLoMask 'XMM_Addr=XMM_Addr & 0x00ffffff or RamData,XMM_Addr 'RamData=RamData | XMM_Addr mov RamLoop,#08 'RamLoop=0x08 or dira,RamCsClkBus 'OutPuts: RamCS,RamCLK,RamBus (full) :SendRamLoop andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=Lo rol RamData,#04 'RamData=RamData <- 0x04 mov RamCopy,RamData 'RamCopy=RamData and RamCopy,#$0F 'RamCopy=RamCopy & 0x0f shl RamCopy,#Ram_D0_Pin 'RamCopy=RamCopy << Ram_D0_Pin or outa,RamCopy 'Send RamCopy To RamBus shl RamCopy,#04 'RamCopy=RamCopy << 0x04 or outa,RamCopy 'Send RamCopy To RamBus or outa,RamCLK 'RamCLK=HI djnz RamLoop,#:SendRamLoop 'if(--RamLoop) goto SendRamLoop andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=Lo shr RamData,#24 'RamData=RamData >> 24 xor RamData,#ReadCmd 'RamData=RamData ^ ReadCmd (0x03) tjnz RamData,#SendWriteReq_ret 'if(RamData != 0) goto SendWriteReq_ret andn dira,RamBus 'Make RamBus An InPut MemClock mov ClkLoop,#02 'ClkLoop=0x02 :MemClockPulse or outa,RamCLK 'RamCLK=Hi andn outa,RamCLK 'RamCLK=Lo djnz ClkLoop,#:MemClockPulse 'if(--ClkLoop) goto ReadClock MemClock_ret SendWriteReq_ret SendReadReq_ret ret 'Return '==================================== DIRECT API FUNCTIONS ======================================== '--------------------------XMM_WriteLong & XMM_WriteMult (Cog -> XMM)------------------------------ #ifdef NEED_XMM_WRITELONG XMM_WriteLong mov XMM_Len,#04 'XMM_Len=4 (Write Long) XMM_WriteMult call #SendWriteReq 'Send Memory Write Request add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len mov RamLoop,XMM_Len 'RamLoop=XMM_Len XMM_Src mov RamData,0-0 'CogRam -> RamData :XMMWriteLoop andn outa,RamBus 'RamBus=L mov RamCopy,RamData 'RamCopy=RamData and RamCopy,#$FF 'RamCopy=RamCopy & 0xff shl RamCopy,#Ram_D0_Pin 'RamCopy=RamCopy << Ram_D0_Pin or outa,RamCopy 'RamBus=RamCopy call #MemClock 'Send Two Clock Pulses shr RamData,#08 'RamData=RamData >> 0x08 djnz RamLoop,#:XMMWriteLoop 'if(--RamLoop) goto XMMWriteLoop andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=L or outa,RamCS 'RamCS=H XMM_WriteMult_ret XMM_WriteLong_ret ret 'Return #endif '---------------------------XMM_ReadLong & XMM_ReadMult (XMM -> Cog)------------------------------- #ifdef NEED_XMM_READLONG XMM_ReadLong mov XMM_Len,#04 'XMM_Len=4 (Read A Long) XMM_ReadMult call #SendReadReq 'Send Memory Read Request add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len mov RamLoop,XMM_Len 'RamLoop=XMM_Len mov RamData,#0 'RamData=0 mov RamSlide,#0 'RamSlide=0 :XMMReadLoop mov RamCopy,INA 'RamCopy=INA shr RamCopy,#Ram_D0_Pin 'RamCopy=RamCopy >> Ram_D0_Pin and RamCopy,#$FF 'RamCopy=RamCopy & 0xff call #MemClock 'Send Two Clock Pulses shl RamCopy,RamSlide 'RamCopy=RamCopy << RamSlide or RamData,RamCopy 'RamData=RamData | RamCopy add RamSlide,#08 'RamSlide=RamSlide + 0x08 djnz RamLoop,#:XMMReadLoop 'if(--RamLoop) goto XMMReadLoop XMM_Dst mov 0-0,RamData 'XMM_Dst=RamData or outa,RamCS 'RamCS=H XMM_ReadMult_ret XMM_ReadLong_ret ret 'Return #endif '====================================XMM MEMORY CACHING FUNCTIONS================================== '----------------------------XMM_WRITEPAGE FUNCTION (HubRam -> XMM)-------------------------------- #ifdef NEED_XMM_WRITEPAGE XMM_WritePage andn outa,RamCS 'RamCS=Lo (SRAM Active) call #SendWriteReq 'Send Memory Write Request add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len :GetHubByte rdbyte RamData,Hub_Addr 'HubRam -> RamData andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=L shl RamData,#Ram_D0_Pin 'RamData=RamData << Ram_D0_Pin or outa,RamData 'RamBus=RamData call #MemClock 'Send Two Clock Pulses add Hub_Addr,#01 'Hub_Addr=Hub_Addr + 1 djnz XMM_Len,#:GetHubByte 'if(--XMM_Len) goto GetHubByte andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=L or outa,RamCS 'RamCS=Hi (SRAM Inactive) XMM_WritePage_ret ret #endif '----------------------------XMM_READPAGE FUNCTION (XMM -> HubRam)--------------------------------- #ifdef NEED_XMM_READPAGE XMM_ReadPage andn outa,RamCS 'RamCS=L (SRAM Active) call #SendReadReq 'Send Memory Read Request add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len :XmmData mov RamData,ina 'RamData=RamBus shr RamData,#Ram_D0_Pin 'RamData=RamData >> Ram_D0_Pin and RamData,#$FF 'RamData=RamData & call #MemClock 'Send Two Clock Pulses wrbyte RamData,Hub_Addr 'RamData -> HubRam andn outa,RamCLK 'RamCLK=Lo add Hub_Addr,#01 'Hub_Addr=Hub_Addr + 1 djnz XMM_Len,#:XmmData 'if(--XMM_Len > 0) goto XmmData andn outa,RamCsClkBus 'RamCS=L,RamCLK=L,RamBus=L or outa,RamCS 'RamCS=H (SRAM Inactive) XMM_ReadPage_ret ret 'Return #endif '==================================== FLASH API FUNCTIONS ==================================== DAT #ifdef NEED_FLASH XMM_FlashActivate nop ' <== INSERT CODE HERE XMM_FlashActivate_ret ret XMM_FlashTristate nop ' <== INSERT CODE HERE XMM_FlashTristate_ret ret XMM_FlashWritePage nop ' <== INSERT CODE HERE XMM_FlashWritePage_ret ret XMM_FlashReadPage nop ' <== INSERT CODE HERE XMM_FlashReadPage_ret ret XMM_FlashCheckEmpty nop ' <== INSERT CODE HERE XMM_FlashCheckEmpty_ret ret XMM_FlashComparePage nop ' <== INSERT CODE HERE XMM_FlashComparePage_ret ret XMM_FlashEraseChip nop ' <== INSERT CODE HERE XMM_FlashEraseChip_ret ret XMM_FlashEraseBlock nop ' <== INSERT CODE HERE XMM_FlashEraseBlock_ret ret XMM_FlashUnprotect nop ' <== INSERT CODE HERE XMM_FlashUnprotect_ret ret XMM_FlashWriteEnable nop ' <== INSERT CODE HERE XMM_FlashWriteEnable_ret ret XMM_FlashWaitUntilDone nop ' <== INSERT CODE HERE XMM_FlashWaitUntilDone_ret ret #endif '======================================SRAM Signals================================================ RamInitSig long Ram_Init_Sig RamCsClkBus long Ram_Cs_Clk_Bus RamCsClkSi long Ram_CS_CLK_SI RamBus long Ram_Bus RamCLK long Ram_CLK RamCS long Ram_CS '=====================================SRAM Constants=============================================== RamLoMask long $00FFFFFF '=====================================SRAM Variables=============================================== ClkLoop long 0 RamLoop long 0 RamData long 0 RamCopy long 0 RamSlide long 0