'Segment Is CUSTOM_XMM.INC 'Dual SRAM Memory Driver For Prop1 'Last Revision On 26Jun23 '=============================================================================== { ' The XMM functions included are controlled via Catalina symbols defined ' internally as required within various Catalina files: ' ' CACHED : defined if CACHE in use (any size) ' ' NEED_FLASH : defined if FLASH support required ' ' NEED_XMM_READLONG : defined if XMM_ReadLong (and XMM_ReadMult) required ' ' NEED_XMM_WRITELONG : defined if XMM_WriteLong (and XMM_WriteMult) required ' ' NEED_XMM_READPAGE : defined if XMM_ReadPage required ' ' NEED_XMM_WRITEPAGE : defined if XMM_WritePage required } '=============================== CACHE CHECK =================================== ' ' If this platform does not need the cache enabled, delete the following: ' '#ifndef CACHED '#error : PLATFORM REQUIRES CACHE OPTION (CACHED_1K .. CACHED_8K or CACHED) '#endif ' '====================================== FLASH CHECK ========================================== ' ' If this platform has FLASH RAM, delete the following: ' '#ifdef NEED_FLASH '#error : FLASH NOT SUPPORTED ON THIS PLATFORM '#endif ' '=============================CONSTANTS FOR THIS CONFIGURATION================================ CON Ram_CS_Pin = 27 Ram_CLK_Pin = 26 Ram_Bus_D7 = 25 'SRAM2 D3 --> HOLD Ram_Bus_D6 = 24 'SRAM2 D2 --> DNU Ram_Bus_D5 = 23 'SRAM2 D1 --> SO Ram_Bus_D4 = 22 'SRAM2 D0 --> SI Ram_Bus_D3 = 21 'SRAM1 D3 --> HOLD Ram_Bus_D2 = 20 'SRAM1 D2 --> DNU Ram_Bus_D1 = 19 'SRAM1 D1 --> SO Ram_Bus_D0 = 18 'SRAM1 D0 --> SI Ram_CLK = (|< Ram_CLK_Pin) Ram_CS = (|< Ram_CS_Pin) Ram_SPI_HOLD = (|< Ram_Bus_D7) | (|< Ram_Bus_D3) Ram_SPI_DNU = (|< Ram_Bus_D6) | (|< Ram_Bus_D2) Ram_SPI_SO = (|< Ram_Bus_D5) | (|< Ram_Bus_D1) Ram_SPI_SI = (|< Ram_Bus_D4) | (|< Ram_Bus_D0) Ram_Bus = Ram_SPI_HOLD | Ram_SPI_DNU | Ram_SPI_SO | Ram_SPI_SI Ram_Signals = Ram_CLK | Ram_CS | Ram_SPI_SI | Ram_SPI_HOLD Ram_Bus_Clear = Ram_Bus | Ram_CLK RamWrite = $02 RamRead = $03 RamSeq = $01400000 DAT '====================================== MINIMAL API FUNCTIONS ====================================== '=======================================XMM_ACTIVATE FUNCTION======================================= XMM_Activate or dira,RamSignals 'Make RamCS,RamCLK,RamSPISI,RamHOLD Outputs or outa,RamSignals 'Set RamCLK=1,RamCS=1,D3=1,D0=1 call #MakeQuadMode 'Switch SRAMs To Quad Mode call #MakeRamSeq 'Force Seq Access Mode XMM_Activate_ret ret 'Return To Calling Function '=========================================XMM_TRISTATE FUNCTION===================================== XMM_Tristate andn dira,RamSignals 'Disable RamClk,RamSel,D3,D0 andn dira,RamBus 'Disable RamBus XMM_Tristate_ret ret 'Return To Calling Function '===========================================MakeQuadMode============================================ MakeQuadMode mov RamLoop,#08 'RamLoop=0x08 mov RamData,#$1C 'RamData=0x1c (mirror of 0x38) andn outa,RamCS 'RamCS=Lo :MakeQuadModeLoop andn outa,RamCLK 'RamCLK=Lo andn outa,RamSPISI 'RamSPISI=Lo shr RamData,#01 wc 'RamData=RamData >> 0x01 if_c or outa,RamSPISI 'if(carry) RamSPISI=1 or outa,RamCLK 'RamCLK=Hi djnz RamLoop,#:MakeQuadModeLoop 'if(--RamLoop) goto MakeQuadModeLoop andn outa,RamBusClear 'RamCLK=Lo,RamBus=Lo (only RamSPISI) or outa,RamCS 'RamCS=Hi MakeQuadMode_ret ret '============================Send Memory Request Or Command To SRAM================================ SendMemoryCommand or RamData,XMM_Addr 'RamData=RamData | XMM_Addr mov RamLoop,#08 'RamLoop=0x08 SendRamCommand or dira,RamBus 'Make RamBus An OutPut :SendRamLoop rol RamData,#04 'RamData=RamDat <- 0x04 mov RamCopy,RamData 'RamCopy=RamData and RamCopy,#$0F 'RamCopy=RamCopy & 0x0f shl RamCopy,#Ram_Bus_D0 'RamCopy=RamCopy << Ram_Bus_D0 or outa,RamCopy 'RamBus=RamCopy shl RamCopy,#04 'RamCopy=RamCopy << 0x04 or outa,RamCopy 'RamBus=RamCopy or outa,RamCLK 'RamCLK=Hi andn outa,RamBusClear 'RamCLK=Lo,RamBus=Lo (full bus) djnz RamLoop,#:SendRamLoop 'if(--RamLoop) goto SendRamLoop SendRamCommand_ret SendMemoryCommand_ret ret '=================================Send Write Request To Memory===================================== SendWriteCommand mov RamData,RamWriteCmd call #SendMemoryCommand SendWriteCommand_ret ret '=================================Send Read Request To Memory====================================== SendReadCommand mov RamData,RamReadCmd call #SendMemoryCommand mov RamLoop,#02 'RamLoop=0x02 :ReadClock or outa,RamCLK 'RamCLK=Hi andn dira,RamBus 'Make RamBus An InPut andn outa,RamCLK 'RamCLK=Lo djnz RamLoop,#:ReadClock 'if(--RamLoop) goto ReadClock SendReadCommand_ret ret '=================================Force Sequential Access Mode===================================== MakeRamSeq andn outa,RamCS 'RamCS=Lo (SRAM Active) mov RamData,RamSeqCmd 'RamData=RamSeq (0x01400000) mov RamLoop,#04 'RamLoop=0x04 (Send 4 Nibbles) call #SendRamCommand 'Force Seq Access Mode or outa,RamCS 'RamCS=Hi (SRAM Inactive) MakeRamSeq_ret ret '============================XMM_WRITEPAGE FUNCTION (HubRam -> XMM)=========================== #ifdef NEED_XMM_WRITEPAGE XMM_WritePage andn outa,RamCS 'RamCS=Lo (SRAM Active) call #SendWriteCommand 'Configure SRAM For Writing add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len :GetHubByte rdbyte RamData,Hub_Addr 'HubRam -> RamData andn outa,RamBusClear 'RamCLK=Lo,RamBus=Lo (full bus) shl RamData,#Ram_Bus_D0 'RamData=RamData << Ram_Bus_D0 or outa,RamData 'RamBus=RamData add Hub_Addr,#01 'Hub_Addr=Hub_Addr + 1 or outa,RamCLK 'RamCLK=Hi (Latch Data) djnz XMM_Len,#:GetHubByte 'if(--XMM_Len) goto GetHubByte andn outa,RamBusClear 'RamCLK=Lo,RamBus=Lo (full bus) or outa,RamCS 'RamCS=Hi (SRAM Inactive) XMM_WritePage_ret ret 'Return #endif '============================XMM_READPAGE FUNCTION (XMM -> HubRam)============================== #ifdef NEED_XMM_READPAGE XMM_ReadPage andn outa,RamCS 'RamCS=Lo (SRAM Active) call #SendReadCommand 'Configure SRAM For Reading add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len :XmmReadLoop mov RamData,ina 'RamData=RamBus shr RamData,#Ram_Bus_D0 'RamData=RamData >> Ram_Bus_D0 and RamData,#$FF 'RamData=RamData & 0xff or outa,RamCLK 'RamCLK=Hi (ACK Byte) wrbyte RamData,Hub_Addr 'RamData -> HubRam andn outa,RamCLK 'RamCLK=Lo add Hub_Addr,#01 'Hub_Addr=Hub_Addr + 1 djnz XMM_Len,#:XmmReadLoop 'if(--XMM_Len > 0) goto XmmReadLoop or outa,RamCS 'RamCS=Hi (SRAM Inactive) XMM_ReadPage_ret ret 'Return #endif '==================================== DIRECT API FUNCTIONS ===================================== '==========================XMM_WriteLong & XMM_WriteMult (Cog -> XMM)=========================== #ifdef NEED_XMM_WRITELONG XMM_WriteLong mov XMM_Len,#04 'XMM_Len=4 (Write Long) XMM_WriteMult andn outa,RamCS 'RamCS=Lo (SRAM Active) call #SendWriteCommand 'Configure SRAM For Writing add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len XMM_Src mov RamData,0-0 'CogRam -> RamData :XMMWriteLoop andn outa,RamBusClear 'RamCLK=Lo,RamBus=Lo (full bus) rol RamData,#08 'RamData=RamData <- 0x08 mov RamCopy,RamData 'RamCopy=RamData and RamCopy,#$FF 'RamCopy=RamCopy & 0xff shl RamCopy,#Ram_Bus_D0 'RamCopy=RamCopy << Ram_Bus_D0 or outa,RamCopy 'RamBus=RamCopy or outa,RamCLK 'RamCLK=Hi djnz XMM_Len,#:XMMWriteLoop 'if(--XMM_Len) goto XMMWriteLoop andn outa,RamBusClear 'RamCLK=Lo,RamBus=Lo (full bus) or outa,RamCS 'RamCS=Hi XMM_WriteMult_ret XMM_WriteLong_ret ret 'Return #endif '===========================XMM_ReadLong & XMM_ReadMult (XMM -> Cog)============================ #ifdef NEED_XMM_READLONG XMM_ReadLong mov XMM_Len,#04 'XMM_Len=4 (Read A Long) XMM_ReadMult andn outa,RamCS 'RamCS=Lo (SRAM Active) call #SendReadCommand 'Configure SRAM For Reading add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len xor RamData,RamData 'RamData=0 mov RamLoop,#24 'RamLoop=24 :XMMReadLoop mov RamCopy,INA 'RamCopy=INA or outa,RamCLK 'RamCLK=Hi shr RamCopy,#Ram_Bus_D0 'RamCopy=RamCopy >> Ram_Bus_D0 and RamCopy,#$FF 'RamCopy=RamCopy & 0xff shl RamCopy,RamLoop 'RamCopy=RamCopy << RamLoop andn outa,RamCLK 'RamCLK=Lo or RamData,RamCopy 'RamData=RamData | RamCopy sub RamLoop,#08 'RamLoop=RamLoop + 0x08 djnz XMM_Len,#:XMMReadLoop 'if(--XMMLen) goto XMMReadLoop XMM_Dst mov 0-0,RamData 'XMM_Dst=RamData or outa,RamCS 'RamCS=Hi XMM_ReadMult_ret XMM_ReadLong_ret ret 'Return #endif '==================================== FLASH API FUNCTIONS ==================================== DAT #ifdef NEED_FLASH XMM_FlashActivate nop ' <== INSERT CODE HERE XMM_FlashActivate_ret ret XMM_FlashTristate nop ' <== INSERT CODE HERE XMM_FlashTristate_ret ret XMM_FlashWritePage nop ' <== INSERT CODE HERE XMM_FlashWritePage_ret ret XMM_FlashReadPage nop ' <== INSERT CODE HERE XMM_FlashReadPage_ret ret XMM_FlashCheckEmpty nop ' <== INSERT CODE HERE XMM_FlashCheckEmpty_ret ret XMM_FlashComparePage nop ' <== INSERT CODE HERE XMM_FlashComparePage_ret ret XMM_FlashEraseChip nop ' <== INSERT CODE HERE XMM_FlashEraseChip_ret ret XMM_FlashEraseBlock nop ' <== INSERT CODE HERE XMM_FlashEraseBlock_ret ret XMM_FlashUnprotect nop ' <== INSERT CODE HERE XMM_FlashUnprotect_ret ret XMM_FlashWriteEnable nop ' <== INSERT CODE HERE XMM_FlashWriteEnable_ret ret XMM_FlashWaitUntilDone nop ' <== INSERT CODE HERE XMM_FlashWaitUntilDone_ret ret #endif '===============================SRAM Signals======================================================= RamCS long Ram_CS RamCLK long Ram_CLK RamSPISI long Ram_SPI_SI RamSignals long Ram_Signals RamBus long Ram_Bus RamBusClear long Ram_Bus_Clear '===============================SRAM Constants===================================================== RamLoMask long $00FFFFFF RamWriteCmd long RamWrite << 24 RamReadCmd long RamRead << 24 RamSeqCmd long RamSeq '===============================SRAM Variables===================================================== RamLoop long 0 RamData long 0 RamCopy long 0