#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <sys/time.h>

enum {
	// _xinfreq = 20_000_000,
	_xtlfreq = 20_000_000,
	_clkfreq = 300_000_000,
	DOWNLOAD_BAUD = 300_400,
	DEBUG_BAUD = DOWNLOAD_BAUD,

	MOSI = 35,
	CLK = 37,
	CS = 39,
	MISO = 32,
};


static uint32_t  spi_shift_in( uint8_t *addr )

{
    uint32_t  count = 0;    // bytes received count down

    __asm volatile {  // no optimising and enforces Fcache use - Needed to free up the FIFO
		wrfast	#0, addr    // setup the hubRAM FIFO hardware for sequencial writes
		neg	pa, #CLK & 0x20   wc    // INA/INB pin-group in SETPAT
		modz	15   wz    // pin high event in SETPAT
		setpat	mask1, mask1    // CLK high and CS high
		setse1	#2<<6 | CS    // 1=rising-edge, 2=falling-edge, 3=both-edges, 4=low-level, 6=high-level
.retry
		dirl	#MOSI    // disable/reset SPI RX smartpin
		dirh	#MOSI    // enable SPI RX smartpin
.wait
//		jpat	#.retry    // CLK toggled, CS still high, treat as a glitch
		long	0xfbcc_11fd
//		jnse1	#.wait    // wait while CS is high
		long	0xfbcc_29fe

		rep	@.rend, #0    // loop forever, 14 ticks per loop
		testp	#CS   wz    // checking CS first allows final CLK close to CS rising
		testp	#MOSI   wc   // check for completed byte
	if_c	rdpin	pa, #MOSI   // collect the received byte into upper bits of PA
if_nc_and_z	jmp	#.rend    // break loop when no data and CS high
	if_c	rdpin	pa, #MOSI   // collect the received byte
	if_c	rev	pa
	if_c	wfbyte	pa    // write to FIFO (hubRAM)
	if_c	add	count, #1
.rend
	//if_nc	sub	len, count    // bytes received = bufferlength - countdown
	if_nc   tjz	count, #.retry
		ret

mask1		long	(1<<(CS & 0x1f)) | (1<<(CLK & 0x1f))   // CS/CLK pin mask for SETPAT
    }  // Exiting of Fcache/Cogexec triggers an implicit RDFAST - flushing remaining FIFO content to hubRAM

    return count;
}



static size_t  compare( void *src1, size_t size )
{
    size_t  good = 0, pattern = 0;

    __asm volatile {  // no optimising and enforces Fcache use - Needed to free up the FIFO
		rdfast  #0, src1

		rep     @.rend, size
		rfbyte  src1
		incmod  pattern, #255
		cmp     src1, pattern   wz
	if_z	add     good, #1
.rend
    }
    return good;
}

void main(void)
{
    uint32_t count_data = 0;
    uint32_t  m, x, ret;
    uint8_t  rxdata[40_004];

    _wrpin(CS, P_HIGH_15K | P_LOW_FLOAT | P_SYNC_IO | P_SCHMITT_A);  // do this first
    _drvh(CS);  // 15 kR pull-up resistor

    _waitms(200);
    printf( "\n   clkfreq = %d   clkmode = 0x%x\n", _clockfreq(), _clockmode() );

    _wrpin(CLK, P_SYNC_IO | P_SCHMITT_A);  // single ended
//    _wrpin(CLK, P_SYNC_IO | P_FILT0_AB | P_COMPARE_AB);  // differential pair

    m = P_SYNC_RX | P_SYNC_IO | P_SCHMITT_A;  // single ended
//    m = P_SYNC_RX | P_SYNC_IO | P_FILT0_AB | P_COMPARE_AB;  // differential pair
    m |= ((CLK-MOSI) & 0b111) << 24;  // smartB (clock pin) input select
    x = 0b1_00000 | (8-1);  // late sample alignment and 8-bit words
    _pinstart(MOSI, m, x, 0);


    while(1)
    {
        
        ret = spi_shift_in(rxdata+count_data);
        
        printf( " Byte Count = %d, %d, %d", ret,rxdata+count_data, count_data);
        if( ret >= 8 )
            printf( "    Mismatch = %d    BlockID = %d", ret - 1 - compare( &rxdata[1], ret - 1 ), rxdata[0] );
        printf( "\n" );
	count_data+=ret;
	
	/*if(count_data >= 19200){
        for(unsigned i = 0; i < count_data; i++)
           // printf(" %02x",rxdata[i]);
            printf("%d\n",rxdata[i]);
        printf( "\n" );
        }
*/
    }
}