CON 'Rev.16bpp_1b: HyperRam VGA test at 16bpp 'Using HyperRam as VGA screen buffer 'This one is a single 640 pixel read, no tearing, perfect alignment. 'Now using COGATN to syncronize HyperRam with VGA 'Now using SmartPin to clock HyperRam '****************************** '* VGA 640 x 480 x 16bpp * '****************************** CON 'HyperRam pin settings, moved to P32 (make sure to change ina->inb, etc) Messages=$1000 'storage for string messages Pin_RSTn=11+32 Pin_CSn=10+32 Pin_CK=8+32 Pin_RWDS=9+32 Pin_Flag=12+32 'Data on P32..P39 'If moved back to P0..P7, change dirb to dira in lines like this: setbyte dirb,#$FF,#0 CON 'RJA: new for real P2 - you can use different xdiv and xmul to set clock frequency: /10*125 -> 250 MHz _XTALFREQ = 20_000_000 ' crystal frequency _XDIV = 2 ' crystal divider to give 1MHz _XMUL = 25 ' crystal / div * mul _XDIVP = 1 ' crystal / div * mul /divp to give _CLKFREQ (1,2,4..30) _XOSC = %10 'OSC ' %00=OFF, %01=OSC, %10=15pF, %11=30pF _XSEL = %11 'XI+PLL ' %00=rcfast(20+MHz), %01=rcslow(~20KHz), %10=XI(5ms), %11=XI+PLL(10ms) _XPPPP = ((_XDIVP>>1) + 15) & $F ' 1->15, 2->0, 4->1, 6->2...30->14 _CLOCKFREQ = _XTALFREQ / _XDIV * _XMUL / _XDIVP ' internal clock frequency _SETFREQ = 1<<24 + (_XDIV-1)<<18 + (_XMUL-1)<<8 + _XPPPP<<4 + _XOSC<<2 ' %0000_000e_dddddd_mmmmmmmmmm_pppp_cc_00 ' setup oscillator _ENAFREQ = _SETFREQ + _XSEL ' %0000_000e_dddddd_mmmmmmmmmm_pppp_cc_ss ' enable oscillator CON intensity = 80 '0..128 fclk = _CLOCKFREQ 'RJA: Adjusted for real P2 '80_000_000.0 fpix = 25_000_000.0 fset = (fpix / fclk * 2.0) * float($4000_0000) vsync = 4 'vsync pin 'RJA: changed for real P2 CON 'Cog assignments Serial_Cog=3 HyperRam_Cog=2 VGA_Cog=0 CON 'Location of source image data (palette is just before this) BitmapData = $3000 DAT 'Start of HyperRAM test code orgh 0 org 0 '+-------[ Set Xtal ]----------------------------------------------------------+ ' RJA: New for real P2 hubset #0 ' set 20MHz+ mode hubset ##_SETFREQ ' setup oscillator waitx ##20_000_000/100 ' ~10ms hubset ##_ENAFREQ ' enable oscillator '+-----------------------------------------------------------------------------+ coginit #Serial_Cog,##@SerialStart coginit #HyperRam_Cog,##@HyperInit coginit #VGA_Cog,##@VGA_Driver 'this one has to be last as overwrites this cog endStart jmp #endStart DAT 'HyperInit org 0 HyperInit mov x2,#10 Starting mov y2,#1 'Load bmp from hub into HyperRam mov SourceAdd,##BitmapData mov HyperRow,#0 mov k2,##480*2 'twice as much with 16bpp WriteBmpLoop call #WriteRamBurstSub add SourceAdd,##640 add HyperRow,#1 waitx ##200 djnz k2,#WriteBmpLoop waitx ##1000 DAT 'Output from HyperRam 'Wait for VSYNC (normally low) WaitVSyncHigh testp #vsync wz if_nz jmp #WaitVSyncHigh 'wait for vsync high WaitVSyncLow testp #vsync wz if_z jmp #WaitVSyncLow 'wait for vsync low mov HyperRow,#0 ReadBmpLoop1 'preload the first line waitatn call #ReadRamBurstSub waitx #100 add HyperRow,#1 call #ReadRamBurstSub add HyperRow,#1 'Wait for HSYNC WaitHSyncLow waitatn mov y2,#0 ReadBmpLoop2 call #ReadRamBurstSub 'read next line waitx #100 add HyperRow,#1 call #ReadRamBurstSub HyperWait add HyperRow,#1 cmp HyperRow,##350*2 wcz'480*2 wz if_z mov HyperRow,#0 if_z jmp #WaitVSyncHigh mov y2,#0 jmp #WaitHSyncLow call #ShowData done jmp #done dat 'WriteRamBurstSub: write burst WriteRamBurstSub drvh #Pin_CSn drvl #Pin_CK flth #Pin_RWDS 'set address mov HyperAddress,HyperRow 'row# shl HyperAddress,#7 '1024 byte row address with A10 in MSBit for lowest byte '25 bits of address will span and HyperAddress,##$1F_FF_FF_FF 'clear CA47..45 or HyperAddress,##$20_00_00_00 'set CA47..45 for linear write memory 'Read Register#0 'Send Command Address 'setbyte dira,#$FF,#0 setbyte dirb,#$FF,#0 outl #Pin_CSn'andn outa,mCSn 'bring cs low 'Write CA '47=Read/nWrite, 46=Register/nMemory, 45=linear/nWrapped, 44..16=A31..A3 , 2..0=A2..A0 rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA47..40 'lower 5 bits are A31..A27 outnot #Pin_CK rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA39..32 'A26..A19 outnot #Pin_CK rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA31..24 'A18..A11 outnot #Pin_CK rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA23..16 'A10..A3 outnot #Pin_CK setbyte outb,#0,#0 'CA15..8 outnot #Pin_CK setbyte outb,#0,#0 'CA7..0 'lower 3 bits are A2..A0 outnot #Pin_CK 'Latency Clocks nop mov i2,#27'24 'need to check that this is right... LoopLat1 outnot #Pin_CK djnz i2,#LoopLat1 drvl #Pin_RWDS 'prepare to load buffer mov i2,SourceAdd mov y2,##640 writeloop rdbyte x2,i2 add i2,#1 setbyte outb,x2,#0 outnot #Pin_CK djnz y2,#writeloop 'Finish setbyte dirb,#$00,#0 outl #Pin_CK outh #Pin_CSn RET dat 'ReadRamBurstSub: read burst ReadRamBurstSub drvh #Pin_CSn drvl #Pin_CK dirl #Pin_RWDS 'set address mov HyperAddress,HyperRow 'row# mov x2,y2 shl x2,#2 shl HyperAddress,#7 '1024 byte row address with A10 in MSBit for lowest byte add HyperAddress,x2 '25 bits of address will span and HyperAddress,##$1F_FF_FF_FF 'clear CA47..45 or HyperAddress,##$A0_00_00_00 'set CA47..45 for linear read from memory 'Read Register#0 'Send Command Address setbyte dirb,#$FF,#0 outl #Pin_CSn'andn outa,mCSn 'bring cs low 'Write CA '47=Read/nWrite, 46=Register/nMemory, 45=linear/nWrapped, 44..16=A31..A3 , 2..0=A2..A0 rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA47..40 'lower 5 bits are A31..A27 outnot #Pin_CK nop rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA39..32 'A26..A19 outnot #Pin_CK nop rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA31..24 'A18..A11 outnot #Pin_CK nop rol HyperAddress,#8 setbyte outb,HyperAddress,#0 'CA23..16 'A10..A3 outnot #Pin_CK nop setbyte outb,#0,#0 'CA15..8 outnot #Pin_CK nop setbyte outb,#0,#0 'CA7..0 'lower 3 bits are A2..A0 outnot #Pin_CK setbyte dirb,#$00,#0 'release control of buffer 'configure smartpin to run HR clock dirl #Pin_CK wrpin #%1_00110_0,#Pin_CK wxpin #1,#Pin_CK 'add on every clock mov pa,#1 shl pa,#30 '250/4 = 62.5 MHz wypin pa,#Pin_CK dirh #Pin_CK 'prepare to load buffer using fifo loc ptra,#@HyperBuffer mov pa,HyperRow 'if row is odd, write to second half of buffer and pa,#1 wz if_nz add ptra,##640 wrfast #0,ptra 'Wait for Pin_RWDS to go high setse1 #$80+Pin_RWDS waitse1 'read in bytes rep #1,##640 wfbyte inb .reploop2 'Finish dirl #Pin_CK 'turn off smartpin wrpin #0,#Pin_CK 'disable smartpin outl #Pin_CK 'make sure clock is low dirh #Pin_CK outh #Pin_CSn 'End of transaction RET DAT 'showdata showdata loc ptra,#@HyperBuffer rdfast #0,ptra 'Show Data mov x2,#10 OutLoop mov tx_out,#13 call #OutputCharSub rfbyte tx_out call #OutputByteSub djnz x2,#OutLoop ret DAT 'ClockHelperSub ClockHelperSub ' wrbyte #5,tx_target 'send command #5 ret DAT 'variables tx_target long Mailbox1 'Mailbox for serial output tx_hexTarget long Mailbox2 'Mailbox for Hex output tx_out long 0 'holds character to output tx_cnt long 0 x2 long 0 y2 long 0 i2 long 0 j2 long 0 k2 long 0 timer1 long 0 flag2 long 0 mRSTn long 1<