
Originally Posted by
Harprit
Does this mean there is no accumulator like register in PASM
Which makes me think that all registers can be used as targets of math/bit/byte manipulations
Yes all cog memory addresses are register destinations except PAR, INA, and INB (there are advanced exceptions).
Basic PASM syntax: [if various] <instruction> <destination register>, [#]<source> [W[C|Z|R] | NR]
Examples below show 3 ways to loop 20 times.
Code:
PUB main
DAT
ORG 0 ' set the COG address count to 0. 0 is assumed if left out.
PASM_EXAMPLES
{
Names ndx, loop1, loop2, loop3, DIRA, and OUTA are registers.
The name ":loop" can be used multiple times.
Everything with # is an immediate constant which is limited to 0..511
}
MOV DIRA,#$100 ' set bit P8 to output
MOV ndx, #20
loop3
XOR OUTA,DIRA ' toggle bit P8
DJNZ ndx, #loop3' jump to loop3 20
MOV ndx, #20
loop2
XOR OUTA,DIRA ' toggle bit P8
SUB ndx,#1 wz
IF_NZ JMP #loop2 ' jump to loop2 20
MOV ndx, #20
loop1
XOR OUTA,DIRA ' toggle bit P8
SUB ndx,#1
TJNZ ndx,#loop1 ' jump to loop1 20
JMP #$ ' special loop here forever syntax
ndx long 0
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