I've been thinking about doing something like this for several years.
Every so often there is some discussion on this forum about using multiple memory chips in parallel.
When the CS came out I purchased some extra 23K256 SRAM chips. I figured I'd want to learn how to use the 23K256 chips that are on the C3 so I might as will have some extra for other Propeller projects.
I also wanted more memory to use with my machine vision project so I attempted an eight chip/bit SRAM driver.
I stacked the eight DIP chips on top of each other and soldered the common pins together. I soldered the serial in pins to a male header and connected each serial out pin to the male header through a 110 ohm resistor (for each of the eight chips). I also connected the Vdd, Vss, chip select and clock pins to the male header.
I soldered a 10 uF capacitor to the top of the stack.
Here's a picture.
Five of the chips have their serial out pins connected to their serial in with a resistor. The other three chips just have a wire connecting serial in and serial out. (I changed the resistors to wire on the three in to see is the resistors were causing a problem. They weren't.) It turned out to be important to change the data pins to inputs immediately after after giving a read command. Otherwise there was a conflict with the output from the Prop pin and the output from the SRAM.
After writing a one chip driver and testing it on all eight chips, I wrote the eight bit driver. These chips are the easiest SPI devices I've worked with. There aren't very many commands and there are just three modes to the chips. Both of my drivers only use the sequential mode.
Since there are eight chips in parallel each byte is written as one bit per chip. This means the SRAM memory address increments just once for every eight bytes written to, or read from, it.
I looked at the Spin 23K256 driver from the C3 downloads but I haven't looked at other 23K256 drivers.
Now that I've finished my drivers, I'll take a look at any others in the OBEX to see if mine are worth posting there.
Both the single chip and eight chip drivers share the serial in and serial out pins. The single chip driver will need some serious rewriting to use with the C3. If I can't find any fast C3 drivers for these chips, I'll probably modify my driver to work with the C3. I'd be surprised if someone hasn't already written a good (fast) driver for the C3's 23K256 chips.
These SRAM chips don't wear out like EEPROMs, right? I want to use these chips for a circular video capture buffer and the entire chip will be written to several times a second. This is the type of application SRAM is good for, right?
Here are the drivers. They both write a 1,024 block of data to the SRAM, read the data back, compare it with the original data and then write the same block to the next section of SRAM. The drivers continue to write the block of data until the entire SRAM has been tested. If there aren't any errors, the program asks to be turned off.
The 8-bit driver could be faster if the data pins were on Propeller pins 0 through 7. The shift instruction in both the read and write routines could be deleted. This would speed things up a lot since presently the Hub window is missed by one instruction.
Sometime I need to learn the tricks of using the counters for clock signals. I think a counter controlled clock would also speed up this driver.
As is, the 8-bit driver can read and write faster than 1 million bytes a second (@80MHz). The eight 32K chips grouped together makes for 256KBytes of memory.
PASM is awesome!
Single chip version:
Eight chip version:
Edit(3/11/15): I have deleted the archives SramSingleTest110528d - Archive [Date 2011.05.28 Time 11.26].zip
and SramByteTest110528a - Archive [Date 2011.05.28 Time 11.26].zip
I plan to upload this program or an improved version to my GitHub account.
If there isn't a replacement on GitHub send me a message and I'll make sure to upload the replacement code.