'Segment Is CUSTOM_XMM 'Last Revision On 21 Aug 19 '=============================================================================== { ' The XMM functions included are controlled via Catalina symbols defined ' internally as required within various Catalina files: ' ' CACHED : defined if CACHE in use (any size) ' ' NEED_FLASH : defined if FLASH support required ' ' NEED_XMM_READLONG : defined if XMM_ReadLong (and XMM_ReadMult) required ' ' NEED_XMM_WRITELONG : defined if XMM_WriteLong (and XMM_WriteMult) required ' ' NEED_XMM_READPAGE : defined if XMM_ReadPage required ' ' NEED_XMM_WRITEPAGE : defined if XMM_WritePage required } '=============================== CACHE CHECK =================================== ' ' If this platform does not need the cache enabled, delete the following: ' '#ifndef CACHED '#error : PLATFORM REQUIRES CACHE OPTION (CACHED_1K .. CACHED_8K or CACHED) '#endif ' '====================================== FLASH CHECK ========================================== ' ' If this platform has FLASH RAM, delete the following: ' '#ifdef NEED_FLASH '#error : FLASH NOT SUPPORTED ON THIS PLATFORM '#endif ' '=============================CONSTANTS FOR THIS CONFIGURATION================================ CON Ram_Clk_Pin = 27 Ram_Cs_Pin = 26 Ram_Bus_D7 = 25 'SRAM2 D3 -->HOLD Ram_Bus_D6 = 24 'SRAM2 D2 -->DNU Ram_Bus_D5 = 23 'SRAM2 D1 -->SO Ram_Bus_D4 = 22 'SRAM2 D0 -->SI Ram_Bus_D3 = 21 'SRAM1 D3 -->HOLD Ram_Bus_D2 = 20 'SRAM1 D2 -->DNU Ram_Bus_D1 = 19 'SRAM1 D1 -->SO Ram_Bus_D0 = 18 'SRAM1 D0 -->SI Ram_Clk = (|< Ram_Clk_Pin) Ram_Sel = (|< Ram_Cs_Pin) SPI_Hold = (|< Ram_Bus_D7) | (|< Ram_Bus_D3) SPI_DNU = (|< Ram_Bus_D6) | (|< Ram_Bus_D2) SPI_SO = (|< Ram_Bus_D5) | (|< Ram_Bus_D1) SPI_SI = (|< Ram_Bus_D4) | (|< Ram_Bus_D0) SPI_Hi = SPI_SI | SPI_Hold SPI_Lo = SPI_SI | Ram_Clk Ram_Bus = SPI_Hold | SPI_DNU | SPI_SO | SPI_SI Ram_Sigs = Ram_Clk | Ram_Sel | SPI_Hi Ram_Bus_Loc = Ram_Bus_D0 MQM = $38 WDR = $02 RDR = $03 MSEQ = $01400000 DAT '================================== MINIMAL API FUNCTIONS ==================================== '==================================XMM_ACTIVATE FUNCTION====================================== XMM_Activate or dira,RamSigs 'Enable RamClk,RamSel,D3,D0 or outa,RamSigs 'Set RamClk=1,RamSel=1,D3=1,D0=1 call #MakeQuadMode 'Switch To Quad Mode call #MakeRamSeq 'Force Sequential Access Mode XMM_Activate_ret ret 'Return '===================================XMM_TRISTATE FUNCTION===================================== XMM_Tristate andn dira,RamSigs 'Disable RamClk,RamSel,D3,D0 andn dira,RamBus 'Disable RamBus XMM_Tristate_ret ret 'Return '============================XMM_WRITEPAGE FUNCTION (HubRam -> XMM)=========================== #ifdef NEED_XMM_WRITEPAGE XMM_WritePage andn outa,RamSel 'RamSel=Lo (SRAM Active) call #SendWriteCmd 'Configure SRAM For Writing add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len :HubData rdbyte RamData,Hub_Addr 'HubRam -> RamData andn outa,RamBus 'RamBus=0 (Clear RamBus) shl RamData,#Ram_Bus_Loc 'RamData << Ram_Bus_Loc or outa,RamData 'OUTA=RamData or outa,RamClk 'RamClk=Hi (Latch Data) add Hub_Addr,#01 'Hub_Addr=Hub_Addr + 1 andn outa,RamClk 'RamClk=Lo djnz XMM_Len,#:HubData 'if(--XMM_Len > 0) goto HubData or outa,RamSel 'RamSel=Hi (SRAM Inactive) XMM_WritePage_ret ret 'Return #endif '============================XMM_READPAGE FUNCTION (XMM -> HubRam)============================== #ifdef NEED_XMM_READPAGE XMM_ReadPage andn outa,RamSel 'RamSel=Lo (SRAM Active) call #SendReadCmd 'Configure SRAM For Reading add XMM_Addr,XMM_Len 'XMM_Addr=XMM_Addr + XMM_Len :XmmData mov RamData,ina 'RamData=INA shr RamData,#Ram_Bus_Loc 'RamData=RamData >> Ram_Bus_Loc and RamData,#$FF 'RamData=RamData & 0xFF or outa,RamClk 'RamClk=Hi (ACK Byte) wrbyte RamData,Hub_Addr 'RamData -> HubRam andn outa,RamClk 'RamClk=Lo add Hub_Addr,#01 'Hub_Addr=Hub_Addr + 1 djnz XMM_Len,#:XmmData 'if(--XMM_Len > 0) goto XmmData or outa,RamSel 'RamSel=Hi (SRAM Inactive) XMM_ReadPage_ret ret 'Return #endif '==================================== DIRECT API FUNCTIONS ===================================== '===========================XMM_ReadLong & XMM_ReadMult (XMM -> Cog)============================ #ifdef NEED_XMM_READLONG XMM_ReadLong XMM_ReadMult XMM_Dst mov 0-0,RamData 'RamData -> CogRam XMM_ReadMult_ret XMM_ReadLong_ret ret #endif '==========================XMM_WriteLong & XMM_WriteMult (Cog -> XMM)=========================== #ifdef NEED_XMM_WRITELONG XMM_WriteLong XMM_WriteMult XMM_Src mov RamData,0-0 'CogRam -> RamData XMM_WriteMult_ret XMM_WriteLong_ret ret #endif '==================================== FLASH API FUNCTIONS ==================================== DAT #ifdef NEED_FLASH XMM_FlashActivate nop ' <== INSERT CODE HERE XMM_FlashActivate_ret ret XMM_FlashTristate nop ' <== INSERT CODE HERE XMM_FlashTristate_ret ret XMM_FlashWritePage nop ' <== INSERT CODE HERE XMM_FlashWritePage_ret ret XMM_FlashReadPage nop ' <== INSERT CODE HERE XMM_FlashReadPage_ret ret XMM_FlashCheckEmpty nop ' <== INSERT CODE HERE XMM_FlashCheckEmpty_ret ret XMM_FlashComparePage nop ' <== INSERT CODE HERE XMM_FlashComparePage_ret ret XMM_FlashEraseChip nop ' <== INSERT CODE HERE XMM_FlashEraseChip_ret ret XMM_FlashEraseBlock nop ' <== INSERT CODE HERE XMM_FlashEraseBlock_ret ret XMM_FlashUnprotect nop ' <== INSERT CODE HERE XMM_FlashUnprotect_ret ret XMM_FlashWriteEnable nop ' <== INSERT CODE HERE XMM_FlashWriteEnable_ret ret XMM_FlashWaitUntilDone nop ' <== INSERT CODE HERE XMM_FlashWaitUntilDone_ret ret #endif '=====================Common Required Functions For SRAM Read/Write=========================== '--------------------------------Force Quad Mode Operation------------------------------------- MakeQuadMode mov RamSlide,#$80 'RamSlide=0x80 :QuadModeLoop andn outa,SPILo 'Set RamClk=0,D3=1,D0=1 andn outa,RamSel 'RamSel=Lo (SRAM Active) mov RamData,#MQM 'RamData=0x38 and RamData,RamSlide 'RamData=RamData & RamSlide tjz RamData,#:SendClk 'if(RamData == 0) goto SendClk or outa,SPIHi 'Set RamClk=0,D3=1,D0=1 :SendClk or outa,RamClk 'RamClk=Hi shr RamSlide,#01 'RamSlide=RamSlide >> 1 andn outa,RamClk 'RamClk=Lo tjnz RamSlide,#:QuadModeLoop 'if(RamSlide != 0) goto QuadModeLoop or outa,RamSel 'RamSel=Hi (SRAM Inactive) MakeQuadMode_ret ret 'Return '--------------------------------Force Sequential Access Mode---------------------------------- MakeRamSeq andn outa,RamSel 'RamSel=Lo (SRAM Active) mov RamData,RamSeq 'RamData=RamSeq (0x01400000) mov RamLoop,#04 'RamLoop=0x04 (Send 4 Nibbles) call #SendRamCmd 'SendRamCmd or outa,RamSel 'RamSel=Hi (SRAM Inactive) MakeRamSeq_ret ret 'Return '-----------------------SendWriteCmd or SendReadCmd To SRAM------------------------------------ SendWriteCmd mov RamData,#WDR 'RamData=WDR SendReedCmd shl RamData,#24 'RamData=RamData << 24 and XMM_Addr,AddMask 'XMM_Addr=XMM_Addr & 0x00FFFFFF or RamData,XMM_Addr 'RamData=RamData | XMM_Addr mov RamLoop,#08 'RamLoop=0x08 (Send 8 Nibbles) SendRamCmd or dira,RamBus 'RamBus == Output :SendLoop andn outa,RamBus 'RamBus=0x00 rol RamData,#04 'RamData=RamData <= 0x04 mov RamCopy,RamData 'RamCopy=RamData and RamCopy,#$0F 'RamCopy=RamCopy & 0x0F shl RamCopy,#Ram_Bus_Loc 'RamCopy=RamCopy << Ram_Bus_Loc or outa,RamCopy 'OUTA=RamCopy; shl RamCopy,#04 'RamCopy=RamCopy << 4 or outa,RamCopy 'OUTA=RamCopy or outa,RamClk 'RamClk=Hi (Latch Data) andn outa,RamClk 'RamClk=Lo djnz RamLoop,#:SendLoop 'if(--RamLoop > 0) goto SendLoop SendRamCmd_ret SendReedCmd_ret SendWriteCmd_ret ret 'Return '----------------------------------SendReadCmd Only-------------------------------------------- SendReadCmd mov RamData,#RDR 'RamCmd=RDR call #SendReedCmd 'SendReedCmd or outa,RamClk 'RamClk=Hi (First Dummy Clock) andn outa,RamClk 'RamClk=Lo andn dira,RamBus 'RamBus=Input or outa,RamClk 'RamClk=Hi (Second Dummy Clock) andn outa,RamClk 'RamClk=Lo SendReadCmd_ret ret 'Return '====================================SRAM Control Signals======================================= RamClk long Ram_Clk RamSel long Ram_Sel RamSigs long Ram_Sigs RamBus long Ram_Bus SPIHi long SPI_Hi SPILo long SPI_Lo '---------------------------------------RAM Variables--------------------------------------------- RamData long 0 RamCopy long 0 RamLoop long 0 RamSlide long 0 RamDupe long 0 RamSeq long MSEQ AddMask long $00FFFFFF