In search of an odd chip
Beau Schwabe
Posts: 6,547
Hi,
I'm looking for a binary counter with a count/read mode.
In count mode you have your basic CLK and RESET inputs.
In read mode, CLK and RESET inputs are ignored, and you
can serially shift the binary value into a uP.
I can build this with discrete IC’s or implement it into a PIC,
but I am lazy, and was curious if there was something out
there already.
More Specs:
At least 30MHz CLK input (difficult to implement with a PIC)
single 24-bit (preferred) or cascading multiples of 8
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Beau Schwabe - Mask Designer III
National Semiconductor Corporation
(Communication Interface Division)
500 Pinnacle Court, Suite 525
Mail Stop GA1
Norcross,GA 30071
I'm looking for a binary counter with a count/read mode.
In count mode you have your basic CLK and RESET inputs.
In read mode, CLK and RESET inputs are ignored, and you
can serially shift the binary value into a uP.
I can build this with discrete IC’s or implement it into a PIC,
but I am lazy, and was curious if there was something out
there already.
More Specs:
At least 30MHz CLK input (difficult to implement with a PIC)
single 24-bit (preferred) or cascading multiples of 8
▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔▔
Beau Schwabe - Mask Designer III
National Semiconductor Corporation
(Communication Interface Division)
500 Pinnacle Court, Suite 525
Mail Stop GA1
Norcross,GA 30071
Comments
http://www.genapta.com/quadrature decoder.html -- something along the lines of the 1132 might work
http://www.zenic.com/e1/pro_e_zen2014f.htm -- In English rather than Japanese
The 'zen2014f" seems right on from the brief description, but I can't make out the datasheet
Essentially, the main goal here is to create an external PULSIN "feature" with resolutions in the
30nS range capable of counting upwards of 500K (20-bit) that can be read in serially after sampling.
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Beau Schwabe - Mask Designer III
National Semiconductor Corporation
(Communication Interface Division)
500 Pinnacle Court, Suite 525
Mail Stop GA1
Norcross,GA 30071
I know the current draw would be high, but an SX running at high speed may do it.
I don't know off hand how many SX clocks are required to count from an external source.
Bean.
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Check out· the "SX-Video Display Module"
www.TerryHittConsulting.com
·
This has to do with a project that we have discussed in private.... Only I was thinking (800x600)
at 60Hz. I thought it possible that this could be done with a single external IC, thus minimizing
overhead from the SX and also allowing it to work with a BS2 or even a BS1.
I'm not sure that a SX would be quite fast enough to emulate a 24-bit counter at the speeds I
am looking for. However I think that the sample code might look something like this...
'MainLoop:
' BTFSS TriggerPin
' GOTO MainLoop
' CLRW
'Counter:
' ADDLW 1 1
' BTFSC TriggerPin 1(2)
' GOTO Counter 2
'Serout:
' (Serout Routines}
' GOTO MainLoop
... The Counter routine takes 4 clock cycles to iterate, but it only takes into account a single BYTE.
In order to get 24-Bit resolution the 4 clock cycles would increase to ???
the tightest code yet to do this.)
(For reference sake we will say 4 clock cycles)...An SX running at 50MHz with 4 clock cycles for 1/60th
of a second intervals would only allow for a maximum count of 208333. This translates to a resolution
of about (527x395).... at 75MHz an SX only yields a resolution of about (645x483)
Sooooo... a 116MHz SX ought to work
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Beau Schwabe - Mask Designer III
National Semiconductor Corporation
(Communication Interface Division)
500 Pinnacle Court, Suite 525
Mail Stop GA1
Norcross,GA 30071