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The World's First RISC-V Open Source Microcontroller — Parallax Forums

The World's First RISC-V Open Source Microcontroller

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  • Heater.Heater. Posts: 21,233
    Wow, Ken, how did you find that before I did? I have been harping on about RISC V here for ages.

    More wow, Colombia is ahead of the LowRISC project in the UK.

    They have my 100 dollars backing already.

    A swear this will see the end of ARM in cheap embedded devices. Why licence ARM when you can just use RISC V ? Leaving ARM to the "high end" mobile phones and such.

    Then working up from there....

  • Heater.Heater. Posts: 21,233
    To be clear, the RISC V specification is open and free for use by all. Unlike ARM.

    It's not necessary that your particular implementation, in terms of Verilog, VHDL, whatever, of RISC V be open at all.

    But there are are already a number of open source implementations of RISC V around.




  • evanhevanh Posts: 10,437
    It'll be interesting to see if it follows the BSD type of life cycle or if something really does bring it to commercial life. It should eventually be able to push ARM and even Intel out of everywhere.
  • Heater.Heater. Posts: 21,233
    edited 2016-12-08 22:17
    There are a lot of people, the world over, interested in RISC V.

    People like the Indian government that does not want to be beholden to a foreign supplier.

    People like lots of startups who don't want the expense, and more importantly the hassle, of getting ARM licenses.

    Crazy people like me who dream of an open landscape for our computing world.

    And yes the RISC V guys have stated they want to displace ARM and Intel. Sorry I don't have a link to such a statement.

    Consider this: Not many people designing processors and other chips own their own chip fab plants anymore. Not Apple, not AMD, heck not Parallax. The chip fabs are hugely expensive and they will make whatever design you have, be it an ARM or whatever. As a little guy wanting to make some cheap widget that requires a processor what do you do? Intel is not an option. ARM is a hassle. Creating your own CPU is a huge project (See Propeller 2) RISC V is what you need.

    And, you get the advantage that all the software you need is ready to go. Compilers, debuggers, etc, etc. The whole opensource software world is there to be used. That saves a ton of development effort and cost.

    I'm kind of expecting this whole RISC V movement takes over the CPU world in the same way as Linux has taken over the software world.


  • jmgjmg Posts: 14,595
    Ken Gracey wrote: »

    Hmm, that seems to be a fund-raiser, not any tangible real silicon ?

    RISC-V has been around a while, and there was this recent news from MicroSemi, which places Risc-V in a similar place as P2 - ie Working in a FPGA, silicon 'planned'.

    http://www.microsemi.com/products/fpga-soc/soc-processors/risc-v

    Microsemi also have 8051 & M1 & M3 cores, but I cannot see any Logic Usage and MHz figures given anywhere ?

    If the RISC-V can fit in a smaller FPGA, for better specs than ARM, then it gets more appealing.

  • jmgjmg Posts: 14,595
    Heater. wrote: »
    Consider this: Not many people designing processors and other chips own their own chip fab plants anymore. Not Apple, not AMD, heck not Parallax. The chip fabs are hugely expensive and they will make whatever design you have, be it an ARM or whatever. As a little guy wanting to make some cheap widget that requires a processor what do you do? Intel is not an option. ARM is a hassle. Creating your own CPU is a huge project (See Propeller 2) RISC V is what you need.

    Err - that makes no sense.
    " a little guy wanting to make some cheap widget that requires a processor " requires a physically real processor, not some illusion.
    Something he can buy today, well priced, with some lifetime assurance, and tools.

    He cares less about the branding, or core, or any hype at all.

    If he worried about Power, he might seek out one of the new sub-threshold-process ARMs.

    Intel is an option, (for some niches), and ARM is not a hassle, thousands of designs use them.
    There is also MIPs and smaller cores like 8051/STM8/AVR/PIC that are real options.

    What is not an option today, is RISC V - until that little guy can buy real parts, it is vaporware.

    This recent news shows how easily the hype of 'ideas' can get ahead of reality, ....

    http://www.watoday.com.au/technology/innovation/autodesk-boss-explains-why-3d-printing-failed-to-take-off-despite-the-hype-20161205-gt4muf.html
  • Heater.Heater. Posts: 21,233
    Sure it's a fund raiser: https://www.crowdsupply.com/onchip/open-v

    They want a production run so why not.

    Seems they have working silicon, so more than "silicon planned". See link above.

    8051, M1 and M3 are not in the picture here. How open are they? Besides RISC V is a bigger idea than an old 8 bit processor. They are expecting to go to 64 and even 128 bits!

    You can already get RISC V cores to use in FPGA.

    You will not get better specs than ARM for any CPU design in FPGA.
  • jmgjmg Posts: 14,595
    Heater. wrote: »
    Sure it's a fund raiser: https://www.crowdsupply.com/onchip/open-v

    They want a production run so why not.

    Seems they have working silicon, so more than "silicon planned". See link above.

    Yup, your " little guy wanting to make some cheap widget that requires a processor " can't actually make a production run, for quite some time, can he ?
    Heater. wrote: »
    8051, M1 and M3 are not in the picture here.
    Of course they are.
    What does 'open' have to do with your " little guy wanting to make some cheap widget that requires a processor " - he needs parts, and he WILL be worried about price and delivery, much more than a 'open' hype label.
    His accountant and customers will care even less about 'open' claims.
    Heater. wrote: »
    How open are they?

    The 8051 has been open for many years, as have other CPUs.
    Open Source tool chains are certainly not new, and they support real cores, right now.


    Their buffoon level claims like this
    "You'll also receive three stickers commemorating the production of the world's first truly open source microcontroller"
    do little for credibility.
    - but maybe their target market is not Design Engineers, but more fashionistas ?

    Heater. wrote: »
    Besides RISC V is a bigger idea than an old 8 bit processor. They are expecting to go to 64 and even 128 bits!
    So ?
    What price will they be ?

    What is the System BOM ? - I notice the first generation Silicon is RAM only, and meagre at that.
    Looks to also need two regulators, and a boot memory.... (Stone soup anyone ?)

    Wait up - Are those mandatory regulators and boot memory Open Source too ?! Oops...

    I can buy 8051 Flash variants for under 30c, with MORE memory than this ?

    Heater. wrote: »
    You will not get better specs than ARM for any CPU design in FPGA.
    I'm not sure what you thought you were saying there ?
    There are a number of FPGA optimised cores, that have better specs than ARM, in FPGAs.


  • AribaAriba Posts: 2,440
    edited 2016-12-08 23:52
    Beside the OnChip Open-V from Columbia, there is also the HiFive Board with a real Silicon Risc-V chip on Crowdsupply:
    https://www.crowdsupply.com/sifive/hifive1

    This one is from SiFive, which is a Startup by the Risc-V main designers from Berkeley University.
    These Arduino compatible boards ships on Dec 20.th this year if you are fast!
    (the Open-V is planned for 2018).

    Both chips are very pure in respect of onchip peripherals and memory (8kByte / 16 kByte RAM)
    They are ment to test the Risc-V core and not as a competitor to state of the art ARM chips.

    Andy

    BTW: The SiFive chip is made in 180nm, like the P2 but runs with 320 MHz, mostly single cycle.
  • jmgjmg Posts: 14,595
    Ariba wrote: »
    This one is from SiFive, which is a Startup by the Risc-V main designers from Berkeley University.
    These Arduino compatible boards ships on Dec 20.th this year if you are fast!

    Interesting parts, but no schedule on actual devices - Just boards. They say
    "Can I Purchase Just the Freedom E310 Chips?
    We do plan to make the individual Freedom E310 chips available, but currently the only thing available is the Hifive1 board. There are some additional complexities associated with providing chips and support that we are working through."


    Ariba wrote: »
    Both chips are very pure in respect of onchip peripherals and memory (8kByte / 16 kByte RAM)
    They are ment to test the Risc-V core and not as a competitor to state of the art ARM chips.
    Yup.

    Pluses : This one at least has QuadSPI support, and they have thought about XIP use.

    Minuses: No ADCs, and they make a school-boy mistake of doing 16b timers on a 32b part. ?!
    Only 19 pages of overview, so no hard numbers on UARTS, Timers, SPI speeds & features.
    No mention of capture, just PWM ?



  • TorTor Posts: 2,010
    edited 2016-12-09 08:28
    Unless someone starts producing RISC-V in 10nm (and that will be a huge investment), then it won't get anywhere. 130nm isn't going to compete with anything. It's not a Propeller, with its own niche. It's up against ARM.
    There's that initial hurdle to overcome, and someone will need a lot of confidence to invest that amount of money.
    ARM and Intel had it easier because they were around back when everything was larger and fabs cost (much much) less, and could just carry along as the technology (and cost) changed. RISC-V has to get there in one go if there's to be any competition. If it doesn't, it'll be just a curisiosity and something only for universities and hobbyists.
  • jmgjmg Posts: 14,595
    Forward 4 years, and this is 2020 RISC-V news...

    https://www.cnx-software.com/2020/11/22/esp32-c3-wifi-ble-risc-v-processor-is-pin-to-pin-compatible-with-esp8266/


    "ESP32-C3 WiSoC is pin to pin compatible with ESP8266, works with ESP32 development framework (e.g. ESP-IDF), supports Wi-Fi & Bluetooth LE 5.0 connectivity, and integrates 400KB SRAM & 384KB ROM. It features a single32-bit RISC-V (RV32IMC) core @ 160 MHz, and consume as little as 5uA in deep sleep mode. Pricing will also be similar to ESP8266."

  • Cluso99Cluso99 Posts: 17,476
    jmg wrote: »
    Forward 4 years, and this is 2020 RISC-V news...

    https://www.cnx-software.com/2020/11/22/esp32-c3-wifi-ble-risc-v-processor-is-pin-to-pin-compatible-with-esp8266/


    "ESP32-C3 WiSoC is pin to pin compatible with ESP8266, works with ESP32 development framework (e.g. ESP-IDF), supports Wi-Fi & Bluetooth LE 5.0 connectivity, and integrates 400KB SRAM & 384KB ROM. It features a single32-bit RISC-V (RV32IMC) core @ 160 MHz, and consume as little as 5uA in deep sleep mode. Pricing will also be similar to ESP8266."
    Hackaday article
    https://hackaday.com/2020/11/22/espressif-leaks-esp32-c3-a-wifi-soc-thats-risc-v-and-is-esp8266-pin-compatible/
    Interesting that parts of the chip are not open-sourced!
    The RISC-V is 160MHz, single core to handle everything - wifi, etc.
  • hinvhinv Posts: 1,033
    I would love to see a RISC-V based P3 with GDDR5 or some other fast memory for HUB with onboard ram used for cache and cache-coherency in hardware to keep the cores from having a different view of what is in the hub. From what @"Peter Jakacki" said the bit bashing instructions need some help. RISC-V is extensible to allow for better performance and deterministic behavior additions.
  • hinvhinv Posts: 1,033
    Looks like a module is already available. I wonder what it has for proprietary blobs. I don't trust anything from China that isn't open source, especially if it has radios. That's what I really like about the Propeller and P2. I know, with reasonable certainty, whit is in them.

    https://www.ebay.com/itm/DT-BL10-WiFi-Development-Board-w-BL602-Chipest-for-Application-Development-with/393024370816?hash=item5b8213f880:g:kG8AAOSwQPtft6jU
  • I would love to see a RISC-V based P3...
    There will be no P3 is P2 sales don't add up. It costs a lot of money for a tiny company like Parallax to produce custom silicon. The best way to get to the P3 is to ensure that Parallax is selling millions of P2s every year.
  • Cluso99Cluso99 Posts: 17,476
    JonnyMac wrote: »
    I would love to see a RISC-V based P3...
    There will be no P3 is P2 sales don't add up. It costs a lot of money for a tiny company like Parallax to produce custom silicon. The best way to get to the P3 is to ensure that Parallax is selling millions of P2s every year.
    Yes, it’s great to fantasise.
    There’s so much that could be done with just a shrink to 90 or 120nm with not changing much. A change to RISC-V would be a major redesign!

    However, if we ever expect to see further P2/P3 development, Parallax will need to sell millions of P2’s!

    P2 is real, so let’s help sell those millions by finding markets for those millions :)
  • A RISC-V based P3 would be wonderful. But for now, you can run RISC-V code (with some custom extensions for P2 hardware like smartpins) on a P2:

    https://github.com/totalspectrum/riscvp2
  • TorTor Posts: 2,010
    edited 2020-11-27 10:04
    RISC-V is definitely getting somewhere.. this year it's been looking like RISC-V is about to jump that hurdle I mentioned in my 2016 post (the last one before today). I'm also contemplating getting a P2 board and running ersmith's riscvp2 emu (can the Retroblade 2 do that?).
    Now we just need a RISC-V based "Raspberry Pi" (at that price point!). That would be great. But there are still things that I plan to do that I believe the P2 can do which I can't easily do on a conventional system (I tried). Which is why I'll get myself a P2, eventually.
  • Cluso99Cluso99 Posts: 17,476
    Tor wrote: »
    RISC-V is definitely getting somewhere.. this year it's been looking like RISC-V is about to jump that hurdle I mentioned in my 2016 post (the last one before today). I'm also contemplating getting a P2 board and running ersmith's riscvp2 emu (can the Retroblade 2 do that?).
    Now we just need a RISC-V based "Raspberry Pi" (at that price point!). That would be great. But there are still things that I plan to do that I believe the P2 can do which I can't easily do on a conventional system (I tried). Which is why I'll get myself a P2, eventually.

    I run code compiled by flexspin on my RetroBlade2 so there’s no reason Eric’s riscvp2 will not run. There’s a RetroBlade2 on it’s way to eric as we speak.
  • jmgjmg Posts: 14,595
    ersmith wrote: »
    A RISC-V based P3 would be wonderful. But for now, you can run RISC-V code (with some custom extensions for P2 hardware like smartpins) on a P2:
    https://github.com/totalspectrum/riscvp2
    I see a new Pi format 1GHz RISC V board coming here
    https://beagleboard.org/beaglev

    Your nifty RISC-V emulator could allow a softer/smoother code base transition between a BeagleV host, or a P2 Host, or even both running together.
    Only very critical stuff would need to be in PASM ?

  • pik33pik33 Posts: 943
    P2 is real, so let’s help sell those millions by finding markets for those millions

    I will try, being a technical university teacher, as soon as I get it (the USPS is slow as... ) I can show this for my students (Automatics&Robotics) and the rest of the faculty staff.

    And don't make P3 based on RISC V or anything else than the Propeller itself. As I can see there are a lot of things that can be upgraded in future versions without a revolution in basics. Lower process, more cogs, more HUB RAM, individual, faster CORDIC for every cog, PLL for every cog as it was in P1. The Propeller architecture is one of its kind, don't replace it with anything else.

  • JonnyMacJonnyMac Posts: 7,420
    And don't make P3 based on RISC V or anything else than the Propeller itself.
    There won't be a P3 unless the P2 is a success and turns things around for Parallax. IF there is a P3, it won't be based on RISC-V; Chip prefers assembly instructions that a programmer-friendly.
  • ersmithersmith Posts: 4,755
    RISC-V is extensible, so we could have the best of both worlds -- the base instruction set (for compilers) plus Chip could add high level assembly instructions like the P2 has. This would have the *enormous* advantage that all RISC-V toolchains (including various C compilers, linker, loader, etc.) would be available on day 1. The Parallax specific extensions would have to be added to the assembler, but that's a much smaller job than writing a new assembler from scratch.
  • For me Risc-V is intresting but still missing some features to make it intesting for Microcontroller. Bit manipulation is still in draft status.

    I wish the FPGA would have more (fast, as in video timing) D/A converters.

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