P2D2 - An open hardware reference design for the P2 CPU

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Comments

  • That's a way to go. We must take what is available and must make what we miss. The P2 (and P1) fill the gap between conventional CPU's and FPGA's and have unique analog features. Even when it was hard to wait for these building blocks, Peters way to go in the end is right. All based on Chips way to go ;-)
  • My pcbs landed last week but missed a delivery slot so I should have them tomorrow! I have some other ones I want to send off but I will check out this lot first.
  • My production final P2D2 pcbs were finally delivered today. I'll be busy now making up some for testing.
    The MicroMAT matrix board will also allow me to mount the K210 CPU module directly as can the ESP32 and other 50mil parts. The 100mil pin headers fit nicely as do the 50mil.
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  • Lots of toys to play with! :smile:
  • Are you happy with the edge quality for the castellated holes Peter? A little hard to tell from the photo but the P2PAL looks a bit off alignment and rough. Does any of the copper short between holes after that tool slices the edge? Do you need to clean it up or is it okay?
  • They seem to be fine. The 100mil plate is designed to take a 50mil socket as well as the usual surface mounting so the castellations align over the holes instead of on the pads. Maybe I might do some plates that are purely smd but either one will work fine.
    IMG_20201013_132754.jpg
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  • Woohoo :smiley:
  • Peter JakackiPeter Jakacki Posts: 9,719
    edited 2020-10-15 - 03:06:59
    I made these up last night but I still have to clean them up and test them yet. The P2PAL mates directly to the flipside of the P2D2. I will try placing the HyperRAM separately.
    IMG_20201015_130224.jpg
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  • Looking good!
  • Excellent work Peter. Looks great! :)
  • Gonna be great when it's all done. And even though you can't boot from it having that secondary SPI flash/RAM chip position on P2PAL will be handy for those who may want to use SD and flash at the same time with different COGs. Eg. in Micropython for example you could boot up from main flash and then use SD at your leisure and still have another accessible filesystem on the secondary flash chip which can also support QSPI for higher speed too. Hopefully the SOIC footprint is compatible with the flash devices. Does the same Winbond part fit there too? It does look like you elongated the pads so hopefully it might.
  • @rogloh - Since the PSRAM is a simple soic8 I thought I could check it out first and then lift the CS pin and tie it to Vdd so I can check out the HSPI on the ESP32. The PSRAM is connected up so that I could switch to QSPI mode too.

    On the P2D2 I originally had the standard SOIC8 footprint for the Flash but changed it to handle the wide WSON8 pack with the exposed pad as well as still handle the SOIC8. Anyway, the PSRAM in place of the Flash is also an option for those that use SD for boot.
  • Nice one, Peter, happy commissioning!
  • MaciekMaciek Posts: 151
    edited 2020-10-22 - 11:31:05
    We're in a silence before a storm period, as I understand.

    So, when's the storm coming ? Any time soon ?

    I'd rather spend some of my hard earned money than let record inflation eat a big portion of it while I'm waiting :smile:
  • Peter JakackiPeter Jakacki Posts: 9,719
    edited 2020-10-24 - 03:30:43
    I haven't had the time I wanted to do more but I did build up a P2D2+ and I may have some time in the next few days to play with it a bit more.
    I've made some minor mechanical adjustments to the artwork for external production, just to make it easier to assemble.
    I am using a microMAT for testing and I will probably load on some connectors and my W5500 Ethernet etc.
    IMG_20201024_125921.jpg
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    3572 x 1898 - 451K
  • What a picture!

    Almost screams for a suitable enclosure, of the same class and value (just forget about price-tag-based comparisons).

    I can't resist paraphasing Ettore Bugatti:

    "If comparable...
    ... it is no longer Jakacki"

    https://upload.wikimedia.org/wikipedia/commons/0/09/FoS20162016_0623_162212AA_%2827584750580%29.jpg
  • Nice Peter, good to see the neopixel is lit which most likely means the P2 is really running.

    So when people solder on their P2PAL with the connectors I guess it makes sense to solder at the same time as the actual pin header connector. Looks like you had to solder the pin header/socket directly to P2D2 castellations afterwards.
  • Peter JakackiPeter Jakacki Posts: 9,719
    edited 2020-10-24 - 08:06:56
    The production P2D2+ will be made as a single 4-layer pcb so that it can either be loaded on the P2 side as a plain P2D2 or loaded both sides as the P2D2+. The separate pcbs are useful for testing and initial production and also for mounting to the P2PIN 100mil header plate.

    BTW, when I assembled this one I was a bit messy and the P2D2 castellations got solder on them too, although it's neither here nor there. The P2PAL itself only has castellations and butts up against the pins of the socket.
    ( you can see the unsoldered holes up the front corner where the 1" row spaced castellations of the P2PAL sit over the 1" row spaced pin header holes on the P2D2).
  • Peter JakackiPeter Jakacki Posts: 9,719
    edited 2020-10-24 - 14:29:59
    This board seems to be quite happy to run at 375MHz although I will need to adjust my card initialization timing to take the clock frequency into account. This is running from the USB port from my laptop and VGA is enabled as well. It definitely crashes at 400MHz though.
    I found a bit of garbage from reading the UB3 back over I2C at the higher frequency but a quick test revealed that the I2C bus strong pullup wasn't connected to SCL and it was running off the weak pullup from the UB3 itself :) The UB3 I2C bus has been tested to work at over 3MHz although I slow it down to 1MHz normally.

    Input clock is normally 20MHz although this one is setup with 25MHz but that is configurable via the clkgen.
    BOOTING....  CARD: SANDISK   SD SL08G REV$80 #188035386 DATE:2016/7
    KERNEL            Parallax P2  *TAQOZ RELOADED sIDE*  V2.6 'CHIP' Prop_Ver G 375MHz 200621-1000
       MODULES:
       1508 *TEXT*          VGA BMP TEXT 190800-0000
       1260 *BMV*           BMV VIDEO PLAYER 190800-0000
        772 *WAVE*          WAVE AUDIO FILE PLAYER 190800-0000
        430 *BMP*           BMP FILE VIEWER 190800-0000
       1944 *TIM*           TAQOZ INTERACTIVE MEDIA - AUDIO, TEXT, IMAGE & VIDEO DRIVERS 200403-1200 
       4864 *TIA*           TAQOZ INTERACTIVE ASSEMBLER for the PARALLAX P2 - 200713-1000            
        654 *CLKGEN*        Si5351 Clock generator 190800-0000                                       
       2548 *DISK*          SD DISK REPORTING & FORMATTING TOOLS 190800-0000                         
       4756 *TAFFS*         TAQOZ FAT32 FILE SYSTEM for SD CARD plus VIRTUAL MEMORY  200621-1000     
       1406 *SPIRAM*        LY68L6400 8MB SPI RAM ACCESS 191020-0000                                 
       1774 *DECOMPILER*    A decompiler for TAQOZ 190825-0000                                       
       1314 *RTC*           RV-3028 RTC DATE and TIME 190800-0000                                    
        814 *SMARTPINS*     SMARTPIN FUNCTIONS and drive modes 190800-0000                           
        400 *P2CLOCK*       P2 CLOCK CONTROL 190800-0000                                             
       2204 *ANSI*          ANSI TERMINAL SUPPORT 200410-0000                                        
        396 *EXTEND*        Primary kernel extensions 200621-1000                                    
       5754 *SPIFLASH*                                                                               
    MEMORY MAP                                                                                       
      CODE:         0A080  41,088 bytes                                                              
      WORDS:        1C01B  16,212 bytes                                                              
      DATA:         01F40  1,138 bytes                                                               
      ROOM:                73,627 bytes                                                              
    HARDWARE                                                                                         
      PCB           P2      (P2D2)                                                                   
      CLOCK IN      25.000000MHZ                                                                     
    DEVICES                                                                                          
      SD CARD       7 GB  SANDISK   SD SL08G REV$80 #188035386 DATE:2016/7                           
      SPI FLASH     16MB WINBOND $EF40_1800 #4845614967974022231                                     
      USB           Silicon LaBS, EFM8UB3 P2D�������������������������, ���������������              
    I2C DEVICES                                                                                      
      $36           P2D2 UB USB+SUPPORT  UUID:C6B4F2F622DEE811B17543B1A51F80DA                       
      $A4           RV-3028 RTC                                                                      
      $C4           Si5351A CLOCK GEN                                                                
                    2020/10/25 SUN 00:05:57   37.54'C   Vdd=1.822V                                   
    -------------------------------------------------------------------------------                  
    TAQOZ#  ---  ok                                                                                  
    TAQOZ# fibos ---                                                                                 
    fibo(1) = 441 cycles= 1,176ns @375MHz result = 1                                                 
    fibo(6) = 761 cycles= 2,029ns @375MHz result = 8                                                 
    fibo(11) = 1,081 cycles= 2,882ns @375MHz result = 89                                             
    fibo(16) = 1,401 cycles= 3,736ns @375MHz result = 987                                            
    fibo(21) = 1,721 cycles= 4,589ns @375MHz result = 10,946                                         
    fibo(26) = 2,041 cycles= 5,442ns @375MHz result = 121,393                                        
    fibo(31) = 2,361 cycles= 6,296ns @375MHz result = 1,346,269                                      
    fibo(36) = 2,681 cycles= 7,149ns @375MHz result = 14,930,352                                     
    fibo(41) = 3,001 cycles= 8,002ns @375MHz result = 165,580,141                                    
    fibo(46) = 3,321 cycles= 8,856ns @375MHz result = 1,836,311,903 ok                               
    TAQOZ#
    

    With the faulty SCL pullup the UB3 will still work properly if I slow the bus down.
    TAQOZ# .UB --- Silicon LaBS, EFM8UB3 P2D2v4  USB Bridge UB3_2.5.7G, 0005 ok
    
    Of course when I put it back under the iron I will fix it properly.

    These are the rise time readings for the faulty I2C bus where P57 is good with a 1K pullup but P56 would probably only work at 100kHz bus speed. Very often you will see 10k pullups on the I2C bus but that is only good for up to 400kHz over very short distances and capacitance. There is no reason you couldn't use 1k which is what I use, but almost any CMOS open-drain can handle much heavier pullups. Don't be afraid....
    56  1,666 cycles= 4,442ns @375MHz                                                                
    57  106 cycles= 282ns @375MHz ok
    
  • Things are looking very good!
  • Those clock rates are great. All the RF techniques have paid off. With a few batches under their belt and some environmental chamber work, Parallax stand a fair chance of revising their spec? At the very least, it shows running at the nominal rate will likely be highly reliable.

    Good to hear there wasn't any smoke, old bean :-)
  • I might have smoked something during testing since I hooked a ground up in the wrong place. Oh well, that's life. Maybe I can fix it easily.

    Anyway, it has been running steady at 380MHz and I have been checking current, voltage, noise, temperature etc. Except for what just happened, it has been going well. I mounted my P2D2+ onto a 100mil adapter plate which was fitted with the 100mil female headers the same as the original P2D2, and I had this plugged into one of my test jigs. I also made up a microUSB to USB A on my power adapter so that I could let the PC connect via USB but power the P2D2 from the digital PSU so I could measure the current etc.
  • It would be quite good to figure out what went wrong, what died, and let us know so we don't make the same mistake if there is some sensitivity to grounding something. Maybe you shorted the voltage regulator output? Can that take a short?
  • Hard to imagine to do what Peter does, so how can we imagine to do what he did wrong? The same is true for some people west of germany, as we do know what we did wrong and made it public and still it seems not fully understood.
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