P2 operating temperature range

Comments

• cgracey Posts: 14,133

  2020-10-14 00:57 edited 2020-10-14 01:01

  This is a question.
  
  We were assuming a 2.5 W dissipation with an internal junction temperature of 150 C.
  
  This was calculated considering the chip dissipating 2.5 W and running at 175 MHz, the package's Tja of 18 C / W, the PCB having a 9x9mm via array going down to 2 square inches of 2oz copper, with an ambient temperature of 85 C, poorest manufacturing conditions, and operating voltages down 5%.
  
  So, with an ambient temperature of 85 C, the chip mounted on a board as described above, dissipating 2.5 W, the internal junction temperature would climb to 150 C and the chip could operate at 175 MHz.
  
  The thing is, the power dissipation is WAY lower than expected, so this temperature rating is VERY conservative.
  
  I've been asking Wendy at ON if she could run some timing simulations at lower junction temperatures, but she hasn't gotten back to me, yet. When we get that data, we can curve fit it to come up with realistic numbers.
• evanh Posts: 15,187

  2020-10-14 01:03

  The self limiting frequency feature of the PLL seems like a good way to map the operating boundary of any given application.
  
• Bean Posts: 8,129

  2020-10-14 01:03

  Thanks Chip.
  If you can give me some idea about what the max clock would be at +125°C that we be helpful. No hurry, whenever Wendy gets back to you.
  Is there any issue at -55°C ?
  
  Bean
  
• evanh Posts: 15,187

  2020-10-14 01:06 edited 2020-10-14 01:13

  Bean wrote: »

  If you can give me some idea about what the max clock would be at +125°C that we be helpful. No hurry, whenever Wendy gets back to you.

  Depends quite a lot on power draw by the software. Which can be mitigated by good heat sinking. If the die is at 125 then maybe 250 MHz, certainly 200 MHz easy.
  

  Is there any issue at -55°C ?

  Just the usual mechanical stress damage from thermal cycling.