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EFM8UB3 "P2USB" Features on the P2D2 — Parallax Forums

EFM8UB3 "P2USB" Features on the P2D2

Peter JakackiPeter Jakacki Posts: 10,193
edited 2020-07-31 15:15 in Propeller 2
I'm planning on getting tiny USB serial SIP modules made that use the same USB chip as the P2D2 but here are some of the features of the P2USB chip which btw are up to a 1/4 of the cost of the much larger (and dumb) FT232R.


P2USB FEATURES:

* Silabs EFM8UB3 40k Flash, 48MHz internal - small 3x3mm QFN
* Up to 8Mbd operation
* Disconnects from P2 RXD when not enumerated by host PC
* No phantom power effects - always on
* Holds P2 in reset even if Vin is below operating thresholds, until power is good
* Only resets P2 on valid serial loader pulse - rejects DTR toggles etc
* Forces P2 boot to ignore Flash and SD on serial load or long button press
* Bidirectional external reset request signal - reset external chips.
* SD power control - always pulses SD power off for a clean reset during reset or by I2C command
* Watchdog control via I2C - defaults to: off at power-up, once triggered can only be retriggered by 8-bit count (5ms .. 1.275s)
* Loads Si5351 clock generator during reset with standard 25MHz or 26MHz crystal for P2 20MHz or user clock configuration.
* I2C commands read analog voltage reference, 1.8V supply, 3.3 rail, USB, and P63 to P56 analog levels
* Monitors P2 transmit data for special escape commands
* 128-bit silicon UUID code
* User read/write of USB config tables in Flash
* 16kB Flash EEPROM emulation - user data independent of SPI Flash and SD
* Timing capture of P2 signals - identify P2 clock rate inc. RCSLOW/FAST
* P2 SPI and I2C port monitoring and control.
* Access P2USB internal registers and memory etc over I2C
* Firmware update over USB as HID

Comments

  • The SD card reset feature, besides being a reliability thing, is basically essential if one wants to mess with the SD bus mode (which besides supporting a 4 bit bus also supports "performance enhancement" features like command queue and write cache that most good cards have (there's actually no reason the latter couldn't work on SPI, but it just doesn't, at least on my SanDisk))
  • Cluso99Cluso99 Posts: 18,066
    Peter,
    If you put it on a tiny pcb with 0.05" pitch headers that can also be castellated so it could be mounted to a main pcb either surface mount or 0.05" pin header, it could be a nice addition for others to utilise.

    One part I am not in total agreement is the Si5351. For me, a 20MHz xtal (or osc) would be the better standard for the P2. I don't see the need for an expensive additional $2 part.

    I guess I'd like to see a lesser option of specs but I think they would be the same, just with some pins unused.

    And a possible thought - rather than simulating an I2C EEPROM, could a SPI FLASH be simulated. Since you have control of the serial at boot time, perhaps even serial loading that 16KB and executing it might be an option instead???
  • jmgjmg Posts: 15,140
    Cluso99 wrote: »
    One part I am not in total agreement is the Si5351. For me, a 20MHz xtal (or osc) would be the better standard for the P2. I don't see the need for an expensive additional $2 part.
    The Si5351A is entirely optional, if the UB3 does not find one of the 3 common Si5351A addresses, it simply skips Si5351A loading.
    Otherwise, it loads from one of two internal tables, based on a config byte.

    On a development board, (like P2D2x) Si5351A gives many flexible options, and allows users to define their own SysCLK, as the P2 PLL is still somewhat coarse.

    If you need oscillator precision, and many P2 projects/tests will, 26MHz is the cheapest sweet spot, as it piggybacks on the large GPS volumes.
    At 26MHz, VCTCXO are also available, and there is a fit option for those, which can jumper to a P2 DAC pin, for a locked timebase design.

  • I'm planning on getting tiny USB serial SIP modules made that use the same USB chip as the P2D2 but here are some of the features of the P2USB chip which btw are up to a 1/4 of the cost of the much larger (and dumb) FT232R.


    P2USB FEATURES:

    * Silabs EFM8UB3 40k Flash, 48MHz internal - small 3x3mm QFN
    * Up to 8Mbd operation
    * Disconnects from P2 RXD when not enumerated by host PC
    * No phantom power effects - always on
    * Holds P2 in reset even if Vin is below operating thresholds, until power is good
    * Only resets P2 on valid serial loader pulse - rejects DTR toggles etc
    * Forces P2 boot to ignore Flash and SD on serial load or long button press
    * Bidirectional external reset request signal - reset external chips.
    * SD power control - always pulses SD power off for a clean reset during reset or by I2C command
    * Watchdog control via I2C - defaults to: off at power-up, once triggered can only be retriggered by 8-bit count (5ms .. 1.275s)
    * Loads Si5351 clock generator during reset with standard 25MHz or 26MHz crystal for P2 20MHz or user clock configuration.
    * I2C commands read analog voltage reference, 1.8V supply, 3.3 rail, USB, and P63 to P56 analog levels
    * Monitors P2 transmit data for special escape commands
    * 128-bit silicon UUID code
    * User read/write of USB config tables in Flash
    * 16kB Flash EEPROM emulation - user data independent of SPI Flash and SD
    * Timing capture of P2 signals - identify P2 clock rate inc. RCSLOW/FAST
    * P2 SPI and I2C port monitoring and control.
    * Access P2USB internal registers and memory etc over I2C
    * Firmware update over USB as HID

    Thats an amazing set of features Peter (& jmg)
  • The Si5351 is part of the P2D2 system and although it is entirely optional since the board allows for a crystal direct into the P2, the $1 it costs is a small fraction of the cost of the P2 chip itself but opens up a lot of flexibility in terms of clock granularity, getting the exact frequency that you might need.
    The fact is that the original P2D2 had a 12MHz crystal since there was no standard yet, but for some reason the P2 EVAL ended up with 20MHz. With the clock gen it doesn't matter what crystal we use and the 26MHz parts are cheap and 0.5pmm, yet we can still generate a standard clean 20MHz to suit software.

    I was intending to make the P2USB module a more compact and matrix board friendly 0.1" 8-pin SIP module rather than an smd component. This makes it more suitable for prototyping as well as for incorporating into a design.
  • roglohrogloh Posts: 5,122
    edited 2020-08-01 21:30
    I think the P2D2 clock flexibility sounds good (especially for people who may want to tweak clocks to be spot on, in say precision audio use). One question : can the clock module speed be changed on the fly after the P2 boots, or does it need to be done before reset?

    If it can be done later, what sequence would need to occur for code that requires a different clock frequency to run without making the change permanent in the UB3 chip? I'm thinking of some case where someone distributes code that people want to test out, that can initially start out with the default 20MHz input but can be modified at runtime (just) for that application's requirements. Is it basically just switch over to rcfast, change the clock via i2c, and then switch back? Does the UB3 even need to know about this?
  • @rogloh - it can be changed at anytime by writing directly to the clkgen registers as glitchless frequency transitions are supported or you could switch to RCFAST. You can make it also write a particular configuration to the UB3 Flash for load at boot operation.
    Alternatively another Flash configuration page could be written and the UB3 can update the Si5351 from the selected table which would be independent of the P2 that would sit idle during that update period.
  • jmgjmg Posts: 15,140
    edited 2020-08-01 09:37
    rogloh wrote: »
    One question : can the clock module speed be changed on the fly after the P2 boots, .
    yes.
    rogloh wrote: »
    Is it basically just switch over to rcfast, change the clock via i2c, and then switch back? Does the UB3 even need to know about this?
    The P2 has the same i2c pins, and UB3 is an i2c slave during P2 Run (and i2c master only during P2 reset ) so P2 can change Si5351 exactly as you state - it is best to switch to RC Fast, as I've noticed Si5351A has somewhat undefined Fout before lock (for a couple of ms).
    Because P2 does not like clock glitches, the UB3 code blanks the outputs during i2c changes and then enables again at the last i2c instructions. Takes 3~3,5ms to load a new freq.


  • roglohrogloh Posts: 5,122
    edited 2020-08-01 08:48
    Sounds good then. Thanks.
  • peter,
    is this easily adaptable to P1 use?
    Jim


  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2020-08-02 02:17
    RS_Jim wrote: »
    peter,
    is this easily adaptable to P1 use?
    Jim


    For sure, and the sip module would make it very easy to add and also includes an optional rtc+cap on the same i2c plus it can provide the P1 clock as well.
  • this sounds very nice,

    Mike
  • Peter,
    great news, I am ready to order 2. Want a beta tester for P1.

    Jim
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