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Prop-2 I/O instructions: dirh, dirl, outh, outl... and pin groups — Parallax Forums

Prop-2 I/O instructions: dirh, dirl, outh, outl... and pin groups

The Propeller-2 assembly-language I/O operations dirh, dirl, outh, outl, and others, handle only one pin assignment at a time. It looks like there's no way to work with a range of non-smart I/O pins if you want to set 6 pins simultaneously (P20-P25, for example), to inputs and use them in parallel to get 6 bits at a time from a device. Is that correct? Perhaps I have missed something obvious. Or maybe using a Smart-Pin mode is the only to handle pin groups in parallel? Thanks. --Jon

Comments

  • TubularTubular Posts: 4,622
    edited 2020-04-27 21:45
    Those are bit operations but there is a way to set span to affect multiple contiguous pins simultaneously

    If you want to read multiple bits at a time read the 32 bit register, INA or INB
  • From the docs,
    "DIRx/OUTx/FLTx/DRVx can now work on a span of pins (+D[10:6] pins). Prior SETQ overrides D[10:6]."

    These operate on the low level signals, it shouldn't matter whether the pin is in a smart pin or normal mode
  • Thanks Tubular. Yes, the INA instruction, but it's not listed in the spreadsheet of assembly-language op codes. Is that just for SPIN? Too bad we don't have an index or table of contents for the Rev 2 doc. The op-code spreadsheet doesn't get updated.

    The software tool FlexGUI doesn't yet accept a value above 511.

    Should the change you noted in the docs be +D[11:6]pins. That range provides six bits for an upper number and six for the lower number, 0-63 for each value. Or does the upper number have a limit of 32?
  • ozpropdevozpropdev Posts: 2,791
    edited 2020-04-27 23:40
    Jon
    To read pins P25 to P20 you would do something like this in assembly.
    		mov	x,ina		'read i/o pins 25 to 20
    		shr	x,#20
    		and	x,#%111111	
    
  • JonTitus wrote: »
    Thanks Tubular. Yes, the INA instruction, but it's not listed in the spreadsheet of assembly-language op codes. Is that just for SPIN? Too bad we don't have an index or table of contents for the Rev 2 doc. The op-code spreadsheet doesn't get updated.

    The software tool FlexGUI doesn't yet accept a value above 511.

    Should the change you noted in the docs be +D[11:6]pins. That range provides six bits for an upper number and six for the lower number, 0-63 for each value. Or does the upper number have a limit of 32?

    Yes, the span is limited to a maximum of 32 pins.
  • RaymanRayman Posts: 13,883
    Somebody should just take the p1 manual and covert to P2 ...

    Wait ... that’s probably a lot work now that I think about it...
  • I'm trying to edit and rewrite the Smart-Pin section of the draft Prop-2 v33 (Rev B Silicon) manual. So this information helps get the correct information out to programmers. Thank you! I appreciate the help given in this forum. --Jon
  • evanhevanh Posts: 15,187
    edited 2020-04-28 03:47
    INA is same as prop1. Not an instruction but a register of 32 bits that shows the high/low state of the lower 32 I/O pins. And INB maps to the upper 32 I/O pins. Same for OUTA/B and DIRA/B.

    There is also new instructions, like DIRH and DIRL, that perform bit operations on those I/O registers. Be aware that the multi-bit feature of these new instructions is restricted to one register at a time. A single DIRH can't set bits in both DIRA and DIRB together.

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