External Ram

I think we missed something in the whole P2 ride, happy that HUBexec replaces LMM. But we did thought a little bit to short.

There should have been a interrupt source if HUB acces is out of HUB size. Especially since a Family of P2 was planned with different HUB sizes.

Like the Debug interrupt it should run user code, handle the HUB access out of range and be able to resume, if no handler there, do as before and just wrap the HUB ram content.




  • Yes that could have been handy...a hub memory access exception interrupt.

    I think we probably asked for too much at the time when someone mentioned paging/virtual memory etc and it scared everyone. Had it been boiled down to a simple bare minimum like HUB address out of range maybe Chip would have been able to add this to the P2 and we might have been able to start to use it.

    Though I imagine there is still quite a lot more complexity to have even that especially with dealing with block transfers going past their HUB address range, streamers, indirect branches, ALT commands, rep loops, skipf code etc etc. I think it probably starts to get very complicated very fast.
  • So... who is keeping the “want list” for the P3? :)
  • > @JRoark said:
    > So... who is keeping the “want list” for the P3? :)

    What do you want in P3?
  • > @cgracey said:
    > > @JRoark said:
    > > So... who is keeping the “want list” for the P3? :)
    > What do you want in P3?

    Honestly? I’m still trying to figure out this amazing new critter called the “P2”!

    I also realize that I’m not the brightest bulb in this string, so for a serious discussion of this subject, I would need to get out of the way and let the real hitters confer. For what I do, the P2 is currently perfect.

    Wishing maybe just a little bit here: I’d love to have a way to read the P3 die temperature, and just maybe to have a full-blown floating point unit under the hood.
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