Memory Breakout Poll



  • Cluso99Cluso99 Posts: 17,136
    edited 2019-06-27 - 09:45:27
    Ok, I see the 10K.
    My assumption was that the IO+15 was connected only to the prop connector, and therefore the external-reset was from the flash/ram. IMHO the schematic is therefore a bit confusing. Often you cannot visualise the whole schematic.
    Since there is plenty of space on P1 of the schematic it might be more prudent to place the links on the parts involved. In fact, all on the one page would be even - it’s a only a tiny circuit.
  • I just noticed this octal-SPI chip on Digikey: GD25LX256E

    I appears that they copied the pinout of HyperFlash…
    At least, at first glance it appears to be pin compatible...
  • Yeah, I think they have compatibility modes to go with the matching pinouts. Sadly none are RAMs. Although, those particular Flash memories do have long wear factor I think. They could do quite well as, say, scope capture buffers.
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