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P2D2 - An open hardware reference design for the P2 CPU

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  • Cluso99Cluso99 Posts: 18,066
    Sometimes it’s just not worth arguing with those that think they know what they are talking about.
    The solder paste jars that anyone here is likely to buy are 250g or 500g jars if you’ve never seen one, they are plastic with an internal plastic slide in cover that traps the paste in an internal airtight seal. Then there is the plastic lid. Not much solvent in there. If you have a tube then its even smaller, and again plastic.

    FWIW I ran our contract assembly plant a number of years ago. We had 4 automated robot pick-n-place machines and a thru hole solder bath (40 ft long with nitrogen feed). The nitrogen tank was about 20ft high and 8ft diameter).

    So yes, I think I know what I am talking about.
  • Cluso99 wrote: »
    Sometimes it’s just not worth arguing with those that think they know what they are talking about.
    The solder paste jars that anyone here is likely to buy are 250g or 500g jars if you’ve never seen one, they are plastic with an internal plastic slide in cover that traps the paste in an internal airtight seal. Then there is the plastic lid. Not much solvent in there. If you have a tube then its even smaller, and again plastic.

    FWIW I ran our contract assembly plant a number of years ago. We had 4 automated robot pick-n-place machines and a thru hole solder bath (40 ft long with nitrogen feed). The nitrogen tank was about 20ft high and 8ft diameter).

    So yes, I think I know what I am talking about.

    Full Ack
  • jmg wrote: »
    Here's the PCAD ASCII version of the P2D2

    Do you have an Altium version with the added RTC ?
    In improving the thermal and vias, I found one mistake, the Si5351A MSOP10 package, is not 0.5mm, but looks to be 0.65mm ?

    Thanks for spotting that one, I don't normally get caught. No idea where I used that MSOP10 package before but I definitely never use any of the standard library parts as they are never quite right. However this all coincided with my pcb semi library getting corrupted too, so now I have to restore that somehow. When I update the package and do a footprint for the supercap I will post the PCAD version. (or just check the Dropbox for an update).
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2019-05-01 05:02
    The MSOP10 pack for the Si5351A has been fixed (thanks jmg) and I ended up using a really small supercap in a 3225 package for the RTC. The RTC option is available on the flipside or on the Mate pcb. Also squeezed in the pullups for I2C which was rather awkward to fit to an already crowded pcb.

    P2D2r2-190501a.pngP2D2r2-190501b.png
  • Cluso99Cluso99 Posts: 18,066
    Nice work Peter.
    Yeah, that Flash chip is huge!
  • roglohrogloh Posts: 5,122
    edited 2019-05-01 06:49
    Back powering the VIN header from the P2D2 5V supply may already work as is due to the TP22919 body diode, but looking at this protection IC footprint I was thinking of something potentially clever to support VIO voltage output too (useful for WiFi Prop Plugs) - if you have pin 4 wired to VIO, and pin 5 to ground and simply rotate the USB protection IC 180 degrees on that footprint, it might be able back power from VIO voltage as well. So you could just fit the chip one way around for getting 5V into the P2 from USB/(or potentially out), and the other way for driving VIO out.

    Now whether it works in the real world is still a slight risk. I think connecting pin 5 to ground is pretty safe, as it seems to be an open drain FET output anyway. Pin 4 is labelled NC "No connect pin, leave floating". If it is not connected that is safe to go to VIO, but perhaps it has other unspecified uses...? You could add a small solder jumper in its path to leave it floating in the regular case unless you want to reverse the part, then we could solder bridge the VIO jumper to try it. Main key is to ground pin 5 on the footprint to allow this.

    Any thoughts?

    EDIT: looking at the board you have above it appears that pin 4 has a thin stub track coming out from it, but doesn't seem to be going anywhere.
  • Cluso99Cluso99 Posts: 18,066
    "No connect, Leave floating" almost always means precisely what it says - there is some internal connection! Don't risk a connection to this pin.
  • Cluso99 wrote: »
    "No connect, Leave floating" almost always means precisely what it says - there is some internal connection! Don't risk a connection to this pin.

    Agreed. Often those mysterious pins are used for testing / programming / etc... and hooking them up could have unfortunate consequences!
  • roglohrogloh Posts: 5,122
    edited 2019-05-01 10:27
    Ok, yep fair enough, I guess that means that idea may not be safe if the part is rotated. So maybe to back power VIN from VIO we just need a solder jumper from pin 3 of this chip to VIO we can bridge, or better yet throw in a Schottky diode footprint across these nets to get even closer to the 3.3V rail from VIO.
  • @Peter the RV-3028-C7 is really a nice part. I didn't know it.
    Pls route also its clock signal to a module's outside pin so that it can be used.

    BTW: INT is an open-drain thus needs a pull-up
    For EVI I've seen you have used apull-down. Since its polarity is configurable it would be better to use a pull-up. It is always better to route outside (eg a tamper switch) GND+Signal rather then VDD+Signal.
  • Cluso99Cluso99 Posts: 18,066
    Peter,
    Once you fit connectors to the P2D2 you cover the silk screen pin numbering.

    What if the 0.05" pitch header were only numbered (after the first/last pair) with every second one coinciding with the closest pin numbering of the main 0.1" pitch connector?
    eg 00 01 -- 03 -- 05 ... 27 -- 29 30 31 (where -- is blank) and the other side 63 62 61 -- 59 ... 35 34 33 32
  • jmgjmg Posts: 15,140
    dMajo wrote: »
    BTW: INT is an open-drain thus needs a pull-up
    For EVI I've seen you have used apull-down. Since its polarity is configurable it would be better to use a pull-up. It is always better to route outside (eg a tamper switch) GND+Signal rather then VDD+Signal.

    For both those, P2 has configurable Pullup/PullDown, so those can be defined when the software enabled the pin, if it decides to.

    The i2c pullups are somewhat optional, the EFM8UB3 has light pullups, of 20uA, which is roughly 165k, and P2 has additional pullup options.
    A 1-10K pullup would permit a faster i2c speed, if using EFM8 master, when P2 is still in reset.

  • roglohrogloh Posts: 5,122
    edited 2019-05-01 23:45
    Note that having I2C pullups fitted on P56, P57 more than likely precludes using these pins for a USB host. Would soft pull-ups then be preferable in that case? I wonder if these pull-ups could just be made optional?
  • jmgjmg Posts: 15,140
    rogloh wrote: »
    Note that having I2C pullups fitted on P56, P57 more than likely precludes using these pins for a USB host. Would soft pull-ups then be preferable in that case? I wonder if these pull-ups could just be made optional?

    Hmm. They can be omitted easily enough, but the weak pullup in EFM8 may be more an issue.
    It defaults ON, and is a single global bit, (WEAKPUD) and is typ 20uA (10~30uA min max), and that will give light pullup on SCL,SDA and also on the 4 flash pins.
    Is that enough to affect the bootloader ?
    SCH shows a 1M pulldown on P60, and a 10k pullup on P61 ? (so the 1M pulldown will not be seen)
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2019-05-02 09:14
    The 1M pulldown is for the SD card chip select so that we can check for low if there is no card or high if the card is inserted and its 50Kish pullup dominates. So there is no need to check and wait for a floating condition.
    The EFM8's weak pullups do not have to be enabled and nor will they be in this case since the PxMDOUT.x bit can be cleared for "open-drain" thus disabling the pull-up even if they are enabled globally.
    I have 10K resistors on the I2C bus but if fast devices are added then it is easy enough to have stronger pull-ups added externally.

    As for the 0.05" pitch header I had implemented this for smd purposes where the pcb is cut along the center of the pads to expose and thus "castellate" them. However I suppose a fine pitch pin header can be affixed here with just the 0.1" header section removed if desired. The 0.05" pads are also handy for probing too and I have added the pin numbers on the bottom overlay as well.

    EVI on the RTC can't be left floating hence the 1M pulldown but with the latest layout it is just as easy now to make it a pullup, which I will do.

    @rogloh - I haven't quite followed why you need power feeding back. Is this due mainly to your motherboard layout?

    BTW, if anyone wants they can view the pcb in the online 3D gerber viewer, just drag the files from the latest gerbers across to this page..


  • roglohrogloh Posts: 5,122
    edited 2019-05-02 13:05
    Hi Peter. No, actually feeding power back is not required in my application - I am thinking more along the lines of increasing the versatility of the P2D2 for other people who might want to easily debug/download a P2D2 remotely without necessarily designing this capability into their board first, like I had to for my board. For example, on the P2D2 you already have the ability to use a PropPlug for debug/download and you've recently also added a USB debug port for people who didn't already have a PropPlug and want to just plug in directly to a PC, and that's all great as it can save needing to add the programming interface stuff to the board/system being developed beforehand or for prototyping etc. Now taking this idea one step further I am imagining it could be handy to have the option to support wireless debug/downloads to the P2D2 simply and without necessarily requiring WiFi to already be present on the main carrier board, just by plugging in a cheap WiFi module such as ESP-8266 onto your header and drawing power directly from the P2D2 in-system by running a passive cable harness between the WiFi module and the P2D2 using the programming pins. This would typically be fine and straightforward if all these modules run off 5V but a lot want to run off 3.3V and there is no 3.3V header pin on that group of pins at the top - yeah you can probably add a regulator for the WiFi module, or solder or clip onto the 3.3V pins somewhere else but it would be great to be able to plug in a simple 5 wire passive cable harness and get WiFi downloads from a cheap 8266 ESP-01S for example. Less mucking about.
  • @rogloh - how about a Schottky from 3.6V to VIN? That way if you have 3.6V on the rail there and no VIN then it will be around 3.2V supplied to VIN. So I went ahead and redid that section with the Schottky.
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2019-05-02 15:05
    If anyone wants they can view the current pcb in the online 3D gerber viewer, just drag the files from the latest gerbers across to this page.
    Unzip the files of course and drag them across. Push the view around with your mouse drag.
  • jmgjmg Posts: 15,140
    @rogloh - how about a Schottky from 3.6V to VIN? That way if you have 3.6V on the rail there and no VIN then it will be around 3.2V supplied to VIN. So I went ahead and redid that section with the Schottky.

    It's probably simpler to just tie 5V pin to 3v3 main supply (as is done on the EFM8) as the MPM38xxx parts have a 100% duty spec, and run to 2.7V.
    With VIN tied to 3v3, the 3v Switcher will be at 100% duty, and the 3v3 LDO will be at saturation.
    Somewhat compromised, but I think 'it will work'. No Schottky needed.
    rogloh wrote: »
    ... This would typically be fine and straightforward if all these modules run off 5V but a lot want to run off 3.3V and there is no 3.3V header pin on that group of pins at the top - yeah you can probably add a regulator for the WiFi module, or solder or clip onto the 3.3V pins somewhere else but it would be great to be able to plug in a simple 5 wire passive cable harness and get WiFi downloads from a cheap 8266 ESP-01S for example. Less mucking about.
    You can bridge 5V pin to 3v3, but is P2 really going to be used in a 3v3 only system ?
    It's rather above 'low power' and the issues are more around how to support more than 500mA supplies.
    rogloh wrote: »
    So maybe to back power VIN from VIO we just need a solder jumper from pin 3 of this chip to VIO we can bridge, or better yet throw in a Schottky diode footprint across these nets to get even closer to the 3.3V rail from VIO.

    On the issue of 3v3 powering, the current SCH has VIO on the 40 pin headers, and that is not actually 3v3 anymore, but higher to give some LDO drop.
    I think it is better to have the digital IO pins, driving to the same voltage as the header supply, so better there would be VA(3v3) and VB(3v3) on the 40 pin headers ?
    That way, simple slave boards would have 'correct and clean' 3v3 supplies.

    That brings us to the LDO, and I'm of 2 minds over the SOT26 package. It is nice to have 2 LDOs in 1 package, but that SOT26 is not great thermally.
    I've added many more thermal vias and coppers around it. but then you still hit the 300mA spec limit, which is well below the SMPS limit...
    The AP7332 is also not great at PSRR > 300kHz, and LDOs with low voltage spans, have poorer PSRR.
    Other choices are teensy QFN parts, close to 1mm (like on P2-EV), but those are also a challenge thermally, and are ok on P2EV because there are so many sprinkled about.

    Working backwards by package, I find an OnSemi NCP187AMT330TAG, single LDO in 2x2mm DFN (that can fit 3 thermal vias), good PSRR, lower noise, and higher current.
    Only minus is it's so new, it is not yet stocked.... but must be close ?

    I'll try a PCB fork, to see if 2 x NCP187 can fit, with good thermal management.
  • @jmg - I very much doubt we will ever need to draw a lot of current on the 3.3V rail but nonetheless power dissipation is minimized by the 3.6V rail. Even at the crazy maximum of 300ma each that is 300ma*0.3V = 90mW *2 = 180mW. The package itself has a 950mW absolute rating so even at this level it is nowhere near the package limit and thermally that adds 25'C, but that is fully max'd. You may have plenty of time on your hands and worry about this but I have plenty of things to do and so I have to be practical :) Nothing will ever be perfect enough but perfectly enough is perfect for me. Adding stuff doesn't attain to perfection, it's when there is nothing left to take away that it is perfect.

    There is 3.3V on the header pins, both VA and VB (switched). My slave boards however will have their own local regulation hence the 3.6V rail although I wouldn't worry about running that directly to logic either. Any chip that outputs less than 3.6V will not cause a problem with 3.3V logic since it needs at least 300mV to even start conducting through the internal diodes.

  • "Nothing will ever be perfect enough but perfectly enough is perfect for me."

    As somewhat of a recovering perfectionist myself, I really loved reading this line. LOL.
  • rogloh wrote: »
    "Nothing will ever be perfect enough but perfectly enough is perfect for me."

    As somewhat of a recovering perfectionist myself, I really loved reading this line. LOL.

    You're not a perfectly recovered perfectionist? That'll never do....

    :-D
  • jmgjmg Posts: 15,140
    .. You may have plenty of time on your hands and worry about this but I have plenty of things to do and so I have to be practical :) Nothing will ever be perfect enough but perfectly enough is perfect for me.

    I'm ok with checking this, so you have time to do those other things :)

    Which brings me to USB connector issues.
    Checking here, reveals that is rather short of 'perfectly enough', as the board edge is too far from the connector.
    Most USB Connectors have sloping entry lips, which are intended to be (just) clear of the board edge (see P2-EV)
    I have seen some PCBs route a small indent slot, so as to make the USB metal edge flush with the overall PCB edge, but that is less common)

    Also, looking at the specs, that's a reverse USB you seem to be using, which requires 2 more slots in the PCB for the tines (not currently present),
    and is less common & higher prices (even tho some purists argue reverse on top and std underneath is more 'correct', it is certainly less common on modules).

    ie The P2-EV board uses non-reverse connectors (tines up), as do all the other Eval boards I have here, and so too do Atmel XPLAINED MINI etc.

    Checking Digikey, the lowest cost/highest volume part with solder stakes is this suggested one (also looks identical to the P2-EV connector)
    609-4618-2-ND 10118194-0001LF Amphenol ICC (FCI) CONN RCPT USB2.0 MICRO B SMD R/A 132,000 stk $0.19056/3k


    Also on USB, checking EFM8UB3 specs, finds
    "Note: The VBUS pin is not required as a sensing pin for proper operation in bus-powered configurations."
    and for non-bus-powered, they suggest 2 resistors to feed VBUS,
    Figure 5.5. Self-Powered Connection Diagram for USB Pins Typical Connection Diagrams

    With the multiple power sources on P2D2, that's really Self-Powered, so maybe those 2 R's need to be added ?

    Fixing the USB placement, will leave the chestnut of what to do with the 4 x 0.1" PP1 COMMS connector ?
    Maybe that can be a SMD version ? Or maybe it just slots behind the moved USB connector ? Seems to fit there.
  • @jmg - all good suggestions - I've used those microUSB connectors before and have stocks of them but I will double-check placement etc. My philosophy is that iterations are always required since we can always make something perfect even better :) Remember too, unlike the old days when we paid hundreds of dollars just for pcb setup, it is easy enough now to get very small runs done, improve the design, etc.

    I did look right into the issue of VBUS and resistors but I'm pretty sure I worked it out and the EFM8 is always powered from 3.3V which can be powered from VBUS etc. If I had stacks of room I might add those resistors but I very much doubt I can damage anything as it is.
  • Looks perfect to me.
    Press SEND Peter! :)
  • jmgjmg Posts: 15,140
    ...
    I did look right into the issue of VBUS and resistors but I'm pretty sure I worked it out and the EFM8 is always powered from 3.3V which can be powered from VBUS etc. If I had stacks of room I might add those resistors but I very much doubt I can damage anything as it is.
    Yeah, you may be right, as I think they worry most about the 'VBUS with no Vcc case', but that's unlikely in the P2D2 circuit and use.
    More likely, is Vcc present with microUSB unplugged, and that is OK, as VBUS will be < Vcc.
  • BTW. I will send the P2D2 off tomorrow either way. I have the Mate pcb with HyperRAM + ESP32 + RTC and also the DEV board to finish off in the meantime.
  • BTW. I will send the P2D2 off tomorrow either way. I have the Mate pcb with HyperRAM + ESP32 + RTC and also the DEV board to finish off in the meantime.

    Sounds really great Peter, and yeah even if there any are minor cleanup issues it's not going to cost much for another spin these days. If needed I'd probably be happy enough to contribute some extra $ to help fund a small P2D2 iteration for you to be able to get a functioning board out to me sooner. Just PM/email me some appropriate price when you know. Then I can hopefully continue my own P2 board development work again which I've sort of put on hold for a few months.

    Cheers!
    Roger.
  • jmg wrote: »
    dMajo wrote: »
    BTW: INT is an open-drain thus needs a pull-up
    For EVI I've seen you have used apull-down. Since its polarity is configurable it would be better to use a pull-up. It is always better to route outside (eg a tamper switch) GND+Signal rather then VDD+Signal.

    For both those, P2 has configurable Pullup/PullDown, so those can be defined when the software enabled the pin, if it decides to.

    The i2c pullups are somewhat optional, the EFM8UB3 has light pullups, of 20uA, which is roughly 165k, and P2 has additional pullup options.
    A 1-10K pullup would permit a faster i2c speed, if using EFM8 master, when P2 is still in reset.

    EVI is a RV-3028-C7's input and as that it could be used to track whatever event, not only P2 related as foreg a tamper switch. Thus its pull-up/down must be P2 unrelated. Pull-up is better because you don't want to route eg to a chassis switch, outside the board, Vdd. Wiring gnd is more safe.
  • The RTC was tacked on as a flip-side option and so initially I didn't worry about EVI and INT too much. This follows my "functionality first, frills second" approach to designing as I find we sometimes bog ourselves down and back ourselves into a corner trying to do too much upfront without getting it finished. But as it turned out I found room to be able to move it around a bit and fix it up.

    Here is the latest schematic that was updated a few days ago.
    P2D2R2%20SCHEMATIC%20190505.png
    3180 x 1960 - 1M
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