SD/fat32 implementations

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  • I actually converted all outa and ina to pins.spin2 function s as specified above
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  • It looks like TAQOZ can support SDXC, but I don't think FSRW can.
    Could that be the issue?

    Do your cards work with FSRW on a P1?
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  • I was able to get it to work with @cheezus FSRW_chz_rc2 See this thread: https://forums.parallax.com/discussion/169786/working-on-fsrw and this post: https://forums.parallax.com/discussion/comment/1467383/#Comment_1467383

    Thanks for everyone's help!

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  • RaymanRayman Posts: 9,916
    edited 2019-03-21 - 19:46:12
    I tried mine with SDHC and it doesn't work... Have to investigate, it's supposed to work...
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  • cheezuscheezus Posts: 267
    edited 2019-03-21 - 22:49:16
    Rayman wrote: »
    I tried mine with SDHC and it doesn't work... Have to investigate, it's supposed to work...

    The version you started with is only going to support SD, not SDHC. There's a lot of work needed to support SDHC. Right now only 24 bit address is sent, not 32 bit address required by sdhc. Minimum changes are;
    pri cmd(op, parm) 
    '
    '   Send a full command sequence, and get and
    '   return the response.  We make sure cs is low,
    '   send the required eight clocks, then the
    '   command and parameter, and then the CRC for
    '   the only command that needs one (the first one).
    '   Finally we spin until we get a result.
    
        DRVL_(cs)
    
        read
        send($40+op)
        send(parm >> 24)
        send(parm >> 16)
        send(parm >> 8)
        send(parm << 0)
        if (op == 0)
            send($95)
        else
            send($87)   
        return readresp
    
    pub start_explicit(iDO, iCLK, iDI, iCS)| t, c   'chz added cmd58 for sdhc
        do := iDO
        clk := iCLK
        di := iDI
        cs := iCS
    
        c := clk
            outh_(cs)
            outh_(clk)
            outh_(di)
            dirh_(cs)
            dirh_(clk)
            dirh_(di)
    
        asm
            rep #.initclksout,   #4800
                drvnot c
    .initclksout       
            getct   t             
       endasm
    
        starttime := t
         
        cmd(0, 0)
        drvh_(cs)               ' Deselect the card to terminate a command.
    
        cmd(8, $1aa)
        read
        read
        read
        read
        drvh_(cs)               ' Deselect the card to terminate a command.  
    
        repeat
                cmd(55, 0)
                t := cmd(41, $4000_0000)
                drvh_(cs)           ' Deselect the card to terminate a command.
                if t <> 1
                    quit
        if t
                return -40'abort -40 ' could not initialize card
    
        cmd(58, 0)
        sdhc := (read >> 6) & 1
        read
        read
        read
        drvh_(cs)               ' Deselect the card to terminate a command.
        if sdhc == 0    ' if not hc   
          return -41    ' fail mount 
          
        return sdhc +1              ' return card type
    
    


    NOTE, this ONLY supports SDHC, not standard SD...
  • I don't understand why there should be any problem getting sdhc and FAT32 running. Essentially you can have a simple SPI receive and a transmit routine, then a block mode that calls that, and then the CMD and SDRD and SDWR routines that form the basis of your driver.
    I think the problem seems to be in adapting fsrw when it is easier to start afresh.
    It's also easier to bit-bash IMO rather than use smartpins. Take a look at the TAQOZ sources and you will see how easy it is.

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  • +1 for what Peter said.
    Or you can look at the ROM SD boot too. There is no write routine but that's not difficult as the same bottom layer routine does both read and write to the SD card combined. Works for SD, SDHC, SDXC.
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  • Peter and Cluso's code was essential for me getting my fsrw working. It was difficult for me because.. I'm me. I hoped sharing my sd code with the community would be helpful but haven't received any feedback until now. I'll continue improving things to try to eek the last bit of performance out of the driver.
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