P2D2 - An open hardware reference design for the P2 CPU

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  • Peter JakackiPeter Jakacki Posts: 8,642
    edited 2018-11-22 - 08:16:12
    If I had spent the time developing for the P2 instead of trying to download and install overly complicated tools, I would have written an assembler already.

    Now if I write an 8051 assembler that works with the C2 programming interface that I already have then all I need to do is write a simple editor.

    Now if I have a simple editor I can finish off my P2 assembler and develop P2 code on the P2.

    Now if I develop code on the P2 then anyone anywhere in the world can develop code for the P2 on the P2.

    Sure, you can have a tool GUI running on your smartphone or tablet or PC, maybe even as a webpage, but the tools are on the P2. A serial link is all that is required, otherwise we have a monitor and keyboard to work with.

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  • Keep going Peter. Being able to load a *bee from the P2 would be really neat.

    Look forward to seeing it materialise tomorrow : ) (or whenever)

  • Tubular wrote: »
    Keep going Peter. Being able to load a *bee from the P2 would be really neat.

    Look forward to seeing it materialise tomorrow : ) (or whenever)

    Maybe not tomorrow, I'm getting a P2D2 with the new chip off to you for further thermal testing. You want it, don't you? :)


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  • jmgjmg Posts: 13,922
    Maybe not tomorrow, I'm getting a P2D2 with the new chip off to you for further thermal testing. You want it, don't you? :)

    Someone was asking how fast a P2 can talk to another P2.

    Anyone lucky enough to have 2 x P2's on their test bench, could run the smart pin Async Channels up to speed, and check how fast the simplest UARTs can link P2-P2 ?
    FTDI FT232H/2232H parts have a fast Serial clocked variant, (half duplex) that can take a 50MHz clock, and emits a FSCTS handshake.

  • Peter JakackiPeter Jakacki Posts: 8,642
    edited 2018-12-21 - 14:03:05
    The new P2D2 revision has been getting some attention the last couple of days as I look at routing everything that I have designed in. If all goes well I will send this off over the holiday period. The on-board SIlabs EFM8UB chip I refer to simply as 2IC as in "second in-command" since it is an assistant that can also take over if need be.

    New features include:
    * Switching reg option for I/O (or LDO options)
    * 16MB HyperRAM
    * Built-in micro USB socket to Silabs EFM8UB supervisory chip (includes USB serial comms)
    * Temperature monitoring
    * Voltage and brown-out monitoring and reference.
    * Direct Prop plug connection overrides USB
    * Reset switch and LEDs on either side
    * PLL current measurement via link resistor
    * 1.8V current measurement via link resistor
    * Micro SD either side
    * 1M pulldown on SD CS for fast card detect.
    * Switchable power to SD (guarantees proper reset)
    * 2IC monitors or drives all 6 boot lines.
    * 2IC communicates to P2 via I2C :)

    There's probably lots of other improvements but this time I'm also getting the heatsink pcb made up too as this can be made with heavy copper and surface mount solders onto the bottom of the P2D2 along with some cutouts for the connectors and HyperRAM. The P2D2 itself is still double sided.

    I may also include an option for the HyperRAM to be mounted on a very thin pcb that can be attached to the bottom using the 0.05" edge strip for connections. This will allow me to test the assembled BGA modules and then simply surface mount them to the rear afterwards.

    The EFM8UB chip includes 48k Flash or more so I could also load a larger version of TAQOZ as if it were the new boot ROM totally transparently without needing anything in Flash or SD. This chip can also be programmed via USB rather than having the P2 program it as was originally intended.

    Here's a rough pcb view nearing completion.
    1469 x 789 - 583K

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  • P2D2V2 looks great Peter. Thats an impressive list of new features

  • Agreed, looking good Peter :smiley:
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
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  • jmgjmg Posts: 13,922
    Here's a rough pcb view nearing completion.

    That looks nice, - some good new features.
    A couple of things spotted:
    Can a USB Micro plug reach the connector ? - usually, the connectors are nearer the PCB edge, as the cables have 'fat' shrouds.
    EFM8UB3 needs caps on VDD and VREGIN (but can probably manage a single MLCC cap on each, not the double caps they show in the DOCs).


  • Peter,
    The features sound great, Looking forward to being able to test drive one,
  • jmg wrote: »
    Here's a rough pcb view nearing completion.

    That looks nice, - some good new features.
    A couple of things spotted:
    Can a USB Micro plug reach the connector ? - usually, the connectors are nearer the PCB edge, as the cables have 'fat' shrouds.
    EFM8UB3 needs caps on VDD and VREGIN (but can probably manage a single MLCC cap on each, not the double caps they show in the DOCs).

    I am keeping an eye on the usb connector and for that reason I will need to make some adjustments in that area. Mechanical problems are usually the reason for having to redo pcbs!

    I've still got some caps to squeeze in and while I'm tempted to go to 0402, I'm also avoiding it for the same reason that I use double-sided as I want to keep it simple enough that anyone with one good eye and a steady hand can assemble themselves. For the same reason that is probably why I will move the BGA24 HyperRAM onto its own very thin pcb although I'd like to still have an option for mounting it direct.

    @TrapperBob - there's one with your name on it!

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  • TorTor Posts: 1,981
    I like the naming convention pattern.. I may wait it out for P2D2V2R4 (release 4..)
  • jmgjmg Posts: 13,922
    I am keeping an eye on the usb connector and for that reason I will need to make some adjustments in that area. Mechanical problems are usually the reason for having to redo pcbs!
    Maybe the 0,1" header option (less needed anymore), can move to a 0.05" SMD on rear side, to allow direct ribbon cable soldering ?
    Std ribbon size of 10 etc could support a IDC transition to 0.1" off the board.

  • I thought this rev should be R2P2 :wink:
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
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  • Very nice Peter, and I'm relieved and thankful to see it should still work out in my own board and enclosure mechanically. I take it that your new EFM8UB USB download can still interoperate with regular serial IO directly from the pins? i.e. it could remain tri-stated when not used? Reason being I also intend to use the serial interface for access and/or downloads etc.
  • What's the status of the P2D2? How many P2 chips do you have and have all of the boards already been spoken for?
  • If I can finalise the artwork over the next few days in between everything else I'm sure that I can get the boards back soon. I just checked the JLCPCB website and it doesn't indicate any particular delays around this time of year other than normal public holidays so assuming all is well then I should have boards made up by the 2nd week of January. I need to use a few for some products but certainly I will make available whatever I have chips for.

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  • Hi Peter. How's the new P2D2 coming along and did you manage to get any boards back yet? I'm really hoping to be able to get my hands on one for my own board if possible to start some P2 programming as I didn't seem to get a P2-ES in the end and those older P2D2s sent to Tubular/ozpropdev were blown up by their dodgy power supplies.
  • Hi Peter,
    Looking forward to the new board! Any updates?
  • The pcb design has been sitting around almost finished since as I have been knee deep in software and getting ready to roll a new TAQOZ for the boot ROM. But I am having a look at what I need to do to finish off the pcb and send it off during the week to the most suitable pcb house for this time of the year. So I'm aiming to have pcbs back the 1st week of February then.

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  • Sorry about the delay to all those who are awaiting a new P2D2 but I will send the artwork off this week but not before I post some layouts and drawings. Remember that this is a module and so I will not be adding any other connectors to it other than the headers, the serial coms, and USB. I am using the same switching regulator for 5V unless I find a compelling reason to change since they do the job very well and I do not need 3A. The I/O will uses LDO regulators or a switcher but I may allow for a ~3.5V (programmable) switcher to feed 3.3V LDO regs for the best of both worlds.

    The microUSB has a Silabs micro acting as the USB serial bridge but also for system control of the P2D2 and as a peripheral for the P2 itself so that we have temperature monitoring and voltage reference etc.

    Tachyon Forth - compact, fast, forthwright and interactive
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  • Looking forward to seeing your updated P2D2 Peter. Glad you have some more time now for improving this cool little module.
  • Yep agreed sounds really good Peter. That switcher worked really well.
  • Peter JakackiPeter Jakacki Posts: 8,642
    edited 2019-04-08 - 02:28:54
    Just going through a checklist now that I am really going to get the P2D2-R2 design sent out this week. I decided to use the MPM38111 dual switch regulator mainly because I was going to use two of the XCL220 devices but I really wanted to be able to adjust the voltage. The reason for adjustable voltage is not for overclocking but mainly for a clean efficient 3.3V by feeding 3.6V into the LDO regulators to achieve a low noise supply. BTW, this rules out the high current AZ1117 unless I boost the voltage up to 4.6V since that regulator has a high dropout voltage but of course that increases the power dissipation. The AP7332 dual LDO will split the I/O power into two groups each capable of handling 300ma and I can't think of any real application that would require more than this directly from the I/O.

    Of course this means that I can boost the 1.8V supply if I am really keen to overclock. (I may have that runtime selectable)

    R2 Features
    1- MPM38111 switcher for 1.8V and 3.6V LDO supplies
    2- AP7332 dual LDO for dual 3.3V dual 300ma low noise fast transient response
    3- EFM8UB micro for USB serial (microUSB) and reset, monitoring and temperature etc.
    4- Dual footprint oscillator option with link for crystal option (also cap for clipped sine)
    5- SD card power switch (clean init)
    6- 50MHz capable SD-SPI interface (5MB/s speeds)
    7- Dual sided (one of) reset switch, power and activity led.
    8- Current links for PLL and 1.8V
    9- Dual sided microSD sockets as per original

    There's also a 1M pull-down on the SD card line since I figure it is far faster to check for high or low than for a floating line. The reset switch itself is not connected directly to the P2 but rather through the EFM8 chip so it debounces but also detects that if the switch is held in then it will force the P2 to boot from serial only which is very useful for bypassing Flash and SD.

    There are some thin sandwich boards as well including the optional heatsink pcb and HyperRAM. Remind me if I've forgotten anything and I will post some schematics and layouts in the next couple of days.

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  • jmgjmg Posts: 13,922
    edited 2019-04-08 - 03:13:14
    .... I decided to use the MPM38111 dual switch regulator mainly because I was going to use two of the XCL220 devices but I really wanted to be able to adjust the voltage.

    The MPM38111 looks the be just 1A rated, which is quite light ?
    Is the MPM38222 (2A out) footprint compatible ?

    or for lower cost. I did find this single module
    https://lcsc.com/product-detail/Others_Cyntec-MUN12AD03-SH_C218787.html

    or with external L, 1 chan, the AP3441 is a very good price, in QFN 2x2mm, and includes PGood pin



  • Hi Peter, glad you managed to get back to working the next P2D2 now. :smile: Can you tell me if the IO voltage split from the dual LDO outputs will just be port A / port B based (equal split), or is it some other mapping? I think the prior P2D2 had split power rails for pins 48-63 from one regulator and the other regulator drove pins from 0-47 (from memory). That had worked nicely for me. This only matters to me as I have a parallel video bus running off port A which will probably generate a lot of switching noise at pixel clock rates and am sort of hoping to be able to isolate this from the audio and other analog outputs on my port B pins to hopefully keep the sound cleaner.
  • Peter JakackiPeter Jakacki Posts: 8,642
    edited 2019-04-08 - 08:10:52
    While there was a decision to use 3A regs for the eval board, there is no reason to assume we need anything like that in normal use. I've pushed my P2D2 hard with its single 1A switcher and LDOs. Now I have two 1A switchers and LDOs. The production P2 chip will draw less power than the ES. The MPM38222 does look footprint compatible though, so I will at least try it.

    The LDOs will be split A/B

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  • jmgjmg Posts: 13,922
    rogloh wrote: »
    Hi Peter, glad you managed to get back to working the next P2D2 now. :smile: Can you tell me if the IO voltage split from the dual LDO outputs will just be port A / port B based (equal split), or is it some other mapping?

    I wonder is a separate LDO choice for the PLL/VCO pin makes sense ? ( I guess that makes 3 LDOs )
    The VCO is not the greatest, so a LDO that simply runs from 5V on that Power group would have cleanest-supply.

  • jmg wrote: »
    rogloh wrote: »
    Hi Peter, glad you managed to get back to working the next P2D2 now. :smile: Can you tell me if the IO voltage split from the dual LDO outputs will just be port A / port B based (equal split), or is it some other mapping?

    I wonder is a separate LDO choice for the PLL/VCO pin makes sense ? ( I guess that makes 3 LDOs )
    The VCO is not the greatest, so a LDO that simply runs from 5V on that Power group would have cleanest-supply.

    I have a ferrite bead on that section but of course all is for naught if that port is used for some noisy I/O.

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  • Sounds great Peter. I need to get onto an adapter board for it.
  • How about HDMI output? Are particular pins recommended for this and do they need special treatment, such as equal trace lengths and other design considerations?
    Formerly known as TonyB
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