I want a P2! And how are we going to get these to you?

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  • Yes Chip !

    I'm planning to catch up with Tubular and OzPropDev next Thursday to bounce around some Goertzel ideas...
  • RJSM wrote: »
    Ym2413a… Please add me to your list for the new P2 board. I’m a regular lurker here but have posted a few times before on these forums describing scientific instruments I’ve built using the Propeller and also regarding boosting memory using PSRAM (aka HyperRAM).

    Re the latter I’m currently working with an IS66WVH8M8ALL/BLL breakout board on a BeMicro-A2. It adds 8MB to a P2 FPGA emulation - the interface is implemented using the streamer/smart pins working co-operatively.

    I’m really keen to make a new version of this for the real Si, aiming to push up the clock speed (from the current 80 MHz), but I’ll also look at migrating to a companion 128 Mb = 16MB part having the same footprint.

    Do you have this all working on the FPGA ? I'm sure Parallax will be keen to verify & quantify on real silicon, asap.
    Is that a standard ISSI breakout board ? - maybe Chip can fit that footprint into the Eval board ? What does the second stacked board do ?

  • RJSM wrote: »
    Yes Chip !

    I'm planning to catch up with Tubular and OzPropDev next Thursday to bounce around some Goertzel ideas...

    The Goertzel thing is working at least as well as planned. It's going to open up a whole new frontier of measurements.
  • cgracey wrote: »
    "Heaps of fun" - That sounds like down-under talk. Do you guys realize that ALL of our prototype chips outside of Parallax are in Australia and New Zealand?

    Sounds about right ;-)
  • Does anyone know why this is so?
  • evanhevanh Posts: 5,664
    edited November 4 Vote Up0Vote Down
    Might be Australia only, I don't have one. I felt I had plenty to still work on using the FPGA only and was a reluctance to burden Peter with sending out too many free P2D2 boards.

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  • jmg

    Some brief history re my HyperRAM project.

    The top purple board was an OSHPark job that just brings out all the HR pins to headers and has a 100n decoupling cap on Vcc. I initially had this running with one of the old FPGA files, maybe v19 or v20. I had some code that wrote 128 byte blocks of random #'s so as to fill the whole 8MB, checking for data integrity after each block write. At the time this board was connected by short ribbon cable to a DE2-115 and I was getting occasional data errors. I think at the time both you and Yanomani helped me with some ideas re fixing this.

    I didn't do any more with this project until it seemed that P2 was getting close - and then at v31 I decided to make a second carrier (the green board - JLCPCB) this time with some R's and C's that I could install in the various control signal lines. I did some experiments now on the BEMicro-A2 and got this running a month or two back - but I still I found I'd get the occasional data error. The error rate was on average around 1 bad block every several thousand full HR writes i.e. perhaps every ~10 GB transferred (also depended on HR drive strength setting) . Some overnight runs went much longer without problems. I actually captured some of the bad blocks into LabVIEW to try and figure out whether there was some obvious pattern in these errors but this was quite time consuming and I didn't persist.

    Since I had no plans to build any instrument projects based on an FPGA board I simply left it at that - waiting for a nascent P2 to arrive. Its exciting to think that time has come !
  • jmgjmg Posts: 12,446
    edited November 4 Vote Up0Vote Down
    RJSM wrote: »
    I didn't do any more with this project until it seemed that P2 was getting close - and then at v31 I decided to make a second carrier (the green board - JLCPCB) this time with some R's and C's that I could install in the various control signal lines. I did some experiments now on the BEMicro-A2 and got this running a month or two back - but I still I found I'd get the occasional data error. The error rate was on average around 1 bad block every several thousand full HR writes i.e. perhaps every ~10 GB transferred (also depended on HR drive strength setting) . Some overnight runs went much longer without problems. I actually captured some of the bad blocks into LabVIEW to try and figure out whether there was some obvious pattern in these errors but this was quite time consuming and I didn't persist.

    Since I had no plans to build any instrument projects based on an FPGA board I simply left it at that - waiting for a nascent P2 to arrive. Its exciting to think that time has come !

    That's good progress, with code ready to go on P2, certainly sounds like you should get one of the next boards.
    I presume you have already seen the SO8 SDRAMs like these ?
    IPS6404L
    LY68L6400SLIT

    The LY68L6400SLIT is almost cheap enough (62c/100) to place standard on the Eval board ?
  • Roy Eltham wrote: »
    David Betz,
    I think you will likely be one helping with dev tools, so I think it's important you get a real chip earlier. There's enough differences between FPGA and the real thing that should be tested related to downloading/etc.
    I'm sure Ken and Chip would like everyone that will be working on dev tools of any kind to have one early.
    We'll see what role I might have if any after we have a tools meeting later in the month.

  • Peter JakackiPeter Jakacki Posts: 7,836
    edited November 4 Vote Up0Vote Down
    cgracey wrote: »
    "Heaps of fun" - That sounds like down-under talk. Do you guys realize that ALL of our prototype chips outside of Parallax are in Australia and New Zealand?

    Sorry, I haven't had time to think about that, I've been too busy having heaps of fun with my P2PC, a P2D2 connected up to a keyboard and VGA monitor and with black text on white it looks quite Hackintosh'ish. I will also be having heaps of fun when I get my P2PC editor and assembler up and running including a built-in logic analyser and maybe a game or two. I can already load and compile TAQOZ code and view images and text files etc from the microSD.

    So what are you guys up-over doing for fun?

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  • cgracey wrote: »
    Does anyone know why this is so?

    They have more time down-under because the sun rises earlier.
    Formerly known as TonyB
  • That's odd.

    I thought we had more time for hacking on things in the winter in Scandinavia because it's so dark all the time and there is little else to do.

  • cgracey wrote: »
    Does anyone know why this is so?

    Sorry, a bit of ironic humour. We Antipodeans often either miss out, run late, and/or pay much more for things developed in the US.

    So, to see the opposite occurring is refreshing.
  • cgracey wrote: »
    Does anyone know why this is so?
    Because they're the only ones you sent P2 prototypes to?

  • Yes, over this last bit of time, some of us didn't have the same time for testing. I think it's as simple as that.

    That was true for me personally, but that is ending here soon.

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  • Is it available for purchase, or sampling by only the qualified testers/engineers here? I had been observing this since 2010. :)
  • Is it available for purchase, or sampling by only the qualified testers/engineers here? I had been observing this since 2010. :)
    I'm pretty sure it's a limited test run of about 100 chips, released for testers and engineers to debug the IC and get a head start on development.

    Given that... there might be hardware bugs and a lack of dev tools for the initial pre-release.

  • Ym2413A, Can you revise me down to 1 Eval Board? I think I can play with one for a while until the P2 is into production.
  • Jim Fouch wrote: »
    Ym2413A, Can you revise me down to 1 Eval Board? I think I can play with one for a while until the P2 is into production.

    Updated. Thanks. : ]
  • I'm in the same place as David is. I really want the Parallax board, and plan on doing tools testing, and some driver development. Happy to buy mine.


    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • I had actually thought that the P2D2 was going to be the Parallax board. I'm not sure why they designed their own. Of course, P2 is their chip so I guess it makes sense but I thought Peter had designed P2D2 to save them some effort.
  • potatoheadpotatohead Posts: 9,503
    edited November 10 Vote Up0Vote Down
    I think it was originally planned that way, but we have two now. I like the P2D2, but I don't want to be greedy, and The Parallax board will occupy my time plenty.



    Do not taunt Happy Fun Ball! @opengeekorg ---> Be Excellent To One Another SKYPE = acuity_doug
    Parallax colors simplified: https://forums.parallax.com/discussion/123709/commented-graphics-demo-spin<br>
  • David Betz wrote: »
    I had actually thought that the P2D2 was going to be the Parallax board. I'm not sure why they designed their own. Of course, P2 is their chip so I guess it makes sense but I thought Peter had designed P2D2 to save them some effort.

    I guess Parallax wanted full control of a P2 design ?

    There is more choice now, but I see pluses and minuses with each.

    Adding a USB-UART to give single board operation is a plus, but the large board size, and the BIG PCB footprint area of the many-parts-SMPS are not going to be great selling features.
  • cgraceycgracey Posts: 10,175
    edited November 10 Vote Up0Vote Down
    jmg wrote: »
    David Betz wrote: »
    I had actually thought that the P2D2 was going to be the Parallax board. I'm not sure why they designed their own. Of course, P2 is their chip so I guess it makes sense but I thought Peter had designed P2D2 to save them some effort.

    I guess Parallax wanted full control of a P2 design ?

    There is more choice now, but I see pluses and minuses with each.

    Adding a USB-UART to give single board operation is a plus, but the large board size, and the BIG PCB footprint area of the many-parts-SMPS are not going to be great selling features.

    I'd like a board that sits flat my desk, like an anchor, that has high-current adjustable power supplies, memory hookups, the USB interface, and connectors onto which I can plug different boards to develop ideas on.

    Because Peter had designed the P2D2 board, we didn't need to make an eval board, at first. We could use the P2D2 to bring up the P2 silicon. The P2D2 is something that is well-suited to embedding into products, but it's not what I'd like for ongoing baseline development. It's small and tight. I need something big and open that I can poke around on.
  • Peter JakackiPeter Jakacki Posts: 7,836
    edited November 10 Vote Up0Vote Down
    The P2 eval board is a board that Chip wanted for his own needs, the supersized regulators, the supersized thermal ground plane, the big ground terminals, the reset switch and leds etc. Even the headers that run off into the four sides aren't designed for connecting to other modules easily, they are just designed so that you can "evaluate" the P2 itself and show it off too. There are lots of things I would do different to make the board more practical but the evaluation board is what it is, an evaluation board.

    Once I finalise my new P2D2 and dev board(s) I will arrange to have these assembled and tested.

    BTW, there was no problem with Parallax making the P2D2 if they wanted to, without any restrictions.

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  • I wonder how many would prefer Peter's P2D2 rev2 board and how many would rather Chip's big board?
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  • Cluso99 wrote: »
    I wonder how many would prefer Peter's P2D2 rev2 board and how many would rather Chip's big board?

    That may depend on exactly what's on P2D2 rev2 ?
    The Eval board has AOZ1284 switchers, external schottky and many other parts, but they are rated for above 5V supply in.

    To give a similar 'above 5V' ability, & similar amps, the P2D2 would need an upgrade to something like MPM3632C (integrated L, 3A, 18V max) 3x5mm package.

  • I want both for different reasons.
  • @cgracey
    The Goertzel thing is working at least as well as planned. It's going to open up a whole new frontier of measurements.

    Great. I will try it with pitch detection with my Pedal Steel guitar . :) Maybe some day I can make something that can capture a note that I play and print it in Tablature (Tablature is a simplified music notation system) on a printer. Of course I will also need to build a filter to get rid of any bad notes LOL

  • AleAle Posts: 2,349
    edited November 10 Vote Up0Vote Down
    I'd like a board that sits flat my desk, like an anchor, that has high-current adjustable power supplies, memory hookups, the USB interface, and connectors onto which I can plug different boards to develop ideas on.

    Because Peter had designed the P2D2 board, we didn't need to make an eval board, at first. We could use the P2D2 to bring up the P2 silicon. The P2D2 is something that is well-suited to embedding into products, but it's not what I'd like for ongoing baseline development. It's small and tight. I need something big and open that I can poke around on.

    And many of us need a platform where we can develop our ideas. it looks quite different for all of us. Both boards are good, imho, I'd like Peter's P2D2 because of its compactness.

    Any ideas how is it going to arrive to the old continent ? :smile:
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